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name:-0.05296802520752
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Islam; Mohammed Rabiul Patent Filings

Islam; Mohammed Rabiul

Patent Applications and Registrations

Patent applications and USPTO patent grants for Islam; Mohammed Rabiul.The latest application filed is for "three-dimensional integrated circuit (3d ic) low-dropout (ldo) regulator power delivery".

Company Profile
2.5.9
  • Islam; Mohammed Rabiul - Austin TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Three-dimensional Integrated Circuit (3D IC) Low-dropout (LDO) Regulator Power Delivery
App 20220302089 - Rusu; Stefan ;   et al.
2022-09-22
Heterogeneous Packaging Integration Of Photonic And Electronic Elements
App 20220283387 - RUSU; Stefan ;   et al.
2022-09-08
Photonic Semiconductor Device And Method
App 20220128759 - Islam; Mohammed Rabiul ;   et al.
2022-04-28
Structures And Methods For High Speed Interconnection In Photonic Systems
App 20220066099 - SONG; Weiwei ;   et al.
2022-03-03
Photonic semiconductor device and method
Grant 11,215,753 - Islam , et al. January 4, 2
2022-01-04
Photonic Semiconductor Device And Method
App 20210271020 - Islam; Mohammed Rabiul ;   et al.
2021-09-02
Method And System For Latch-up Prevention
App 20210117605 - Lai; Po-Chia ;   et al.
2021-04-22
Method for forming a dual inlaid copper interconnect structure
Grant 6,551,919 - Venkatesan , et al. April 22, 2
2003-04-22
Method for forming a copper interconnect using a multi-platen chemical mechanical polishing (CMP) process
App 20020151167 - Farkas, Janos ;   et al.
2002-10-17
Method for forming a copper interconnect using a multi-platen chemical mechanical polishing (CMP) process
Grant 6,444,569 - Farkas , et al. September 3, 2
2002-09-03
Method for forming a dual inlaid copper interconnect structure
App 20020039836 - Venkatesan, Suresh ;   et al.
2002-04-04
Method for forming a dual inlaid copper interconnect structure
Grant 6,326,301 - Venkatesan , et al. December 4, 2
2001-12-04
Method for forming a copper interconnect using a multi-platen chemical mechanical polishing (CMP) process
App 20010027083 - Farkas, Janos ;   et al.
2001-10-04
Method for forming a copper layer over a semiconductor wafer
Grant 6,297,155 - Simpson , et al. October 2, 2
2001-10-02

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