Ishino; Masakazu

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ishino; Masakazu.The latest application filed is for "semiconductor device having a liquid cooling module".

Company Profile

0.20.18

Ishino; Masakazu - Tokyo JP
Ishino; Masakazu - Chuo-ku N/A JP
Ishino; Masakazu - Yokohama JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor device having a liquid cooling module Grant 8,937,390 - Hisano , et al. January 20, 2	2015-01-20
Semiconductor Device Having A Liquid Cooling Module App 20140183730 - HISANO; Nae ; et al.	2014-07-03
Semiconductor device having a liquid cooling module Grant 8,704,352 - Hisano , et al. April 22, 2	2014-04-22
Semiconductor memory device and manufacturing method thereof Grant 8,513,121 - Ishino , et al. August 20, 2	2013-08-20
Wafer Or Circuit Board And Joining Structure Of Wafer Or Circuit Board App 20130140067 - Ishino; Masakazu ; et al.	2013-06-06
Semiconductor Memory Device And Manufacturing Method Thereof App 20130011967 - Ishino; Masakazu ; et al.	2013-01-10
Wafer of circuit board and joining structure of wafer or circuit board Grant 8,334,465 - Ishino , et al. December 18, 2	2012-12-18
Semiconductor memory device and manufacturing method thereof Grant 8,298,940 - Ishino , et al. October 30, 2	2012-10-30
Semiconductor Memory Device And Manufacturing Method Thereof App 20110104852 - ISHINO; Masakazu ; et al.	2011-05-05
Semiconductor memory device and manufacturing method thereof Grant 7,893,540 - Ishino , et al. February 22, 2	2011-02-22
Semiconductor device having a smaller electrostatic capacitance electrode Grant 7,791,196 - Ishino , et al. September 7, 2	2010-09-07
Method for manufacturing a three-dimensional semiconductor device and a wafer used therein Grant 7,754,581 - Ikeda , et al. July 13, 2	2010-07-13
Semiconductor Device Having A Liquid Cooling Module App 20100171213 - HISANO; Nae ; et al.	2010-07-08
Memory module with improved mechanical strength of chips Grant 7,638,362 - Ishino , et al. December 29, 2	2009-12-29
Semiconductor Memory Device And Manufacturing Method Thereof App 20090294990 - ISHINO; Masakazu ; et al.	2009-12-03
Bonding method of semiconductor and laminated structure fabricated thereby Grant 7,618,847 - Tenmei , et al. November 17, 2	2009-11-17
Semiconductor memory device and manufacturing method thereof Grant 7,576,433 - Ishino , et al. August 18, 2	2009-08-18
Memory module that is capable of controlling input/output in accordance with type of memory chip Grant 7,564,127 - Ikeda , et al. July 21, 2	2009-07-21
Semiconductor Apparatus App 20090134498 - IKEDA; Hiroaki ; et al.	2009-05-28
Wafer of circuit board and joining structure of wafer or circuit board App 20090109641 - Ishino; Masakazu ; et al.	2009-04-30
Bonding Method Of Semiconductor And Laminated Structure Fabricated Thereby App 20090072414 - TENMEI; Hiroyuki ; et al.	2009-03-19
Method For Manufacturing A Three-dimensional Semiconductor Device And A Wafer Used Therein App 20080164575 - Ikeda; Hiroaki ; et al.	2008-07-10
Semiconductor Device App 20080136024 - NAKA; Yasuhiro ; et al.	2008-06-12
Method of forming a semiconductor device App 20080009124 - Ishino; Masakazu ; et al.	2008-01-10
Semiconductor Device Having A Smaller Electrostatic Capacitance Electrode App 20070252273 - Ishino; Masakazu ; et al.	2007-11-01
Stacked semiconductor device App 20070181991 - Ishino; Masakazu ; et al.	2007-08-09
Semiconductor memory device and manufacturing method thereof App 20070001281 - Ishino; Masakazu ; et al.	2007-01-04
Memory Module With Improved Mechanical Strength Of Chips App 20060267188 - Ishino; Masakazu ; et al.	2006-11-30
Memory module that is capable of controlling input/output in accordance with type of memory chip App 20060235577 - Ikeda; Hiroaki ; et al.	2006-10-19
Electrode structure of wiring substrate of semiconductor device having expanded pitch Grant 5,886,409 - Ishino , et al. March 23, 1	1999-03-23
Process for forming multilayer wiring Grant 5,670,421 - Nishitani , et al. September 23, 1	1997-09-23
Process for forming multilayer wiring Grant 5,498,768 - Nishitani , et al. March 12, 1	1996-03-12
Wiring board provided with a heat bypass layer Grant 5,285,016 - Narizuka , et al. February 8, 1	1994-02-08
Thin film resistor and wiring board using the same Grant 5,235,313 - Narizuka , et al. August 10, 1	1993-08-10

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.