loadpatents
name:-0.0058720111846924
name:-0.0080060958862305
name:-0.00056195259094238
ISHII; Tatsuki Patent Filings

ISHII; Tatsuki

Patent Applications and Registrations

Patent applications and USPTO patent grants for ISHII; Tatsuki.The latest application filed is for "support structure for in-vehicle component".

Company Profile
0.7.4
  • ISHII; Tatsuki - Hamamatsu-shi JP
  • Ishii; Tatsuki - Nakai JP
  • Ishii; Tatsuki - Hinode JP
  • Ishii; Tatsuki - Tokyo JP
  • Ishii; Tatsuki - Nishitama JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Support Structure For In-vehicle Component
App 20220111922 - ISHII; Tatsuki
2022-04-14
Support Structure For In-vehicle Component
App 20220111921 - ISHII; Tatsuki
2022-04-14
Delay diagnosis method for semiconductor integrated circuit, computer program product for diagnosing delay of semiconductor integrated circuit and computer readable recording medium recording program thereon
Grant 7,013,443 - Iwai , et al. March 14, 2
2006-03-14
Design method and system for achieving a minimum machine cycle for semiconductor integrated circuits
Grant 6,944,840 - Sasaki , et al. September 13, 2
2005-09-13
Delay diagnosis method for semiconductor integrated circuit, computer program product for diagnosing delay of semiconductor integrated circuit and computer readable recording medium recording program thereon
App 20030226126 - Iwai, Yoshihiro ;   et al.
2003-12-04
Design method and system for semiconductor integrated circuits
App 20020114224 - Sasaki, Tetsuo ;   et al.
2002-08-22
Circuit structure, semiconductor integrated circuit and path routing method and apparatus therefor
Grant 5,475,611 - Nagase , et al. December 12, 1
1995-12-12
Method of automatic wiring in a semiconductor device
Grant 5,264,390 - Nagase , et al. November 23, 1
1993-11-23
Input/output pin assignment method
Grant 5,231,589 - Itoh , et al. July 27, 1
1993-07-27
Wiring method for semiconductor integrated circuits
Grant 5,212,107 - Suzuki , et al. May 18, 1
1993-05-18
Method of updating layout of circuit element
Grant 4,805,113 - Ishii , et al. February 14, 1
1989-02-14

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