Ishida; Emi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ishida; Emi.The latest application filed is for "lipid membrane structure containing anti-mt-mmp monoclonal antibody".

Company Profile

0.26.4

Ishida; Emi - Tochigi JP
Ishida; Emi - Tokyo JP
Ishida; Emi - Sunnyvale CA
Ishida, Emi - Taito-ku JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Lipid membrane structure containing anti-mt-mmp monoclonal antibody App 20070112176 - Seiki; Motoharu ; et al.	2007-05-17
Dental adhesive Grant 7,041,714 - Takeshita , et al. May 9, 2	2006-05-09
Ion implantation with improved ion source life expectancy Grant 6,756,600 - Ng , et al. June 29, 2	2004-06-29
Adhesives for dental use App 20040077746 - Takeshita, Hiroshi ; et al.	2004-04-22
Semiconductor processing employing a semiconductor spacer Grant 6,642,134 - Ishida , et al. November 4, 2	2003-11-04
Semiconductor Processing Employing A Semiconducting Spacer App 20030170969 - ISHIDA, EMI ; et al.	2003-09-11
Method of inhibiting lateral diffusion between adjacent wells by introducing carbon or fluorine ions into bottom of STI groove Grant 6,514,833 - Ishida , et al. February 4, 2	2003-02-04
Multiple channel implantation to form retrograde channel profile and to engineer threshold voltage and sub-surface punch-through Grant 6,506,640 - Ishida , et al. January 14, 2	2003-01-14
Oxygen implantation for reduction of junction capacitance in MOS transistors Grant 6,475,868 - Hao , et al. November 5, 2	2002-11-05
MOS transistor processing utilizing UV-nitride removable spacer and HF etch Grant 6,472,283 - Ishida , et al. October 29, 2	2002-10-29
Laser tailoring retrograde channel profile in surfaces Grant 6,444,550 - Hao , et al. September 3, 2	2002-09-03
Removable spacer technology using ion implantation to augment etch rate differences of spacer materials Grant 6,429,083 - Ishida , et al. August 6, 2	2002-08-06
Epitaxial delta doping for retrograde channel profile Grant 6,426,279 - Huster , et al. July 30, 2	2002-07-30
Source/drain doping technique for ultra-thin-body SOI MOS transistors Grant 6,403,433 - Yu , et al. June 11, 2	2002-06-11
Removable spacer technology using ion implantation for forming asymmetric MOS transistors Grant 6,344,396 - Ishida , et al. February 5, 2	2002-02-05
MOS-type transistor processing utilizing UV-nitride removable spacer and HF etch Grant 6,342,423 - Ishida , et al. January 29, 2	2002-01-29
Use of knocked-on oxygen atoms for reduction of transient enhanced diffusion Grant 6,337,260 - Ishida January 8, 2	2002-01-08
Ion Implantation With Improved Ion Source Life Expectancy App 20020000523 - NG, CHE-HOO ; et al.	2002-01-03
Circuit fabrication method which optimizes source/drain contact resistance Grant 6,265,291 - Yu , et al. July 24, 2	2001-07-24
Very low thermal budget channel implant process for semiconductors Grant 6,180,468 - Yu , et al. January 30, 2	2001-01-30
Reduction of boron penetration by laser anneal removal of fluorine Grant 6,100,171 - Ishida August 8, 2	2000-08-08
End-of-range damage suppression for ultra-shallow junction formation Grant 6,074,937 - Pramanick , et al. June 13, 2	2000-06-13
Fabrication of raised source-drain transistor devices Grant 6,051,473 - Ishida , et al. April 18, 2	2000-04-18
Method of selectively annealing damaged doped regions Grant 6,040,019 - Ishida , et al. March 21, 2	2000-03-21
Silicidation and deep source-drain formation prior to source-drain extension formation Grant 5,998,272 - Ishida , et al. December 7, 1	1999-12-07
Reduction of poly depletion in semiconductor integrated circuits Grant 5,966,605 - Ishida October 12, 1	1999-10-12
Formation of low resistivity titanium silicide gates in semiconductor integrated circuits Grant 5,937,325 - Ishida August 10, 1	1999-08-10
Method and apparatus incorporating nitrogen selectively for differential oxide growth Grant 5,904,575 - Ishida , et al. May 18, 1	1999-05-18
Method to incorporate, and a device having, oxide enhancement dopants using gas immersion laser doping (GILD) for selectively growing an oxide layer Grant 5,885,904 - Mehta , et al. March 23, 1	1999-03-23
Method for annealing damaged semiconductor regions allowing for enhanced oxide growth Grant 5,795,627 - Mehta , et al. August 18, 1	1998-08-18

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.