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name:-0.022583961486816
name:-0.013493061065674
name:-0.0013928413391113
Iotov; Mihail Patent Filings

Iotov; Mihail

Patent Applications and Registrations

Patent applications and USPTO patent grants for Iotov; Mihail.The latest application filed is for "system and method for design entry and synthesis in programmable logic devices".

Company Profile
0.8.4
  • Iotov; Mihail - San Jose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and apparatus for comparing programmable logic device configurations
Grant 8,161,469 - Iotov , et al. April 17, 2
2012-04-17
Method and apparatus for compiling programmable logic device configurations
Grant 8,001,537 - Iotov , et al. August 16, 2
2011-08-16
Real-time background legality verification of pin placement
Grant 7,992,119 - Iotov , et al. August 2, 2
2011-08-02
Techniques for graphical analysis and manipulation of circuit timing requirements
Grant 7,580,037 - Iotov August 25, 2
2009-08-25
Methods and apparatus for design entry and synthesis of digital circuits
Grant 7,487,485 - Iotov February 3, 2
2009-02-03
System and method for design entry and synthesis in programmable logic devices
App 20070261014 - Iotov; Mihail ;   et al.
2007-11-08
Method and apparatus for comparing and synchronizing programmable logic device user configuration dataset versions
Grant 7,277,902 - Park , et al. October 2, 2
2007-10-02
System and method for design entry and synthesis in programmable logic devices
Grant 7,159,204 - Iotov , et al. January 2, 2
2007-01-02
Methods and apparatus for design entry and synthesis of digital circuits
App 20060242616 - Iotov; Mihail
2006-10-26
Method and apparatus for comparing and synchronizing programmable logic device user configuration dataset versions
App 20060236293 - Park; Jim ;   et al.
2006-10-19
Methods and apparatus for design entry and synthesis of digital circuits
Grant 7,080,345 - Iotov July 18, 2
2006-07-18
System and method for design entry and synthesis in programmable logic devices
App 20050088867 - Iotov, Mihail ;   et al.
2005-04-28

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