Intersil
Patent Applications and Registrations
Patent applications and USPTO patent grants for Intersil.The latest application filed is for "method for accuracy improvement allowing chip-by-chip measurement correction".
- Intersil -
- Intersil - Santa Clara CA
- Intersil - Cupertino CA
| Patent | Date |
|---|---|
| Method for accuracy improvement allowing chip-by-chip measurement correction App 20070260945 - Dunipace; Richard A. | 2007-11-08 |
| Maximum Energy transfer through cell isolation and discharge App 20070216369 - Chandler; Lance | 2007-09-20 |
| Electrically erasable fused programmable logic array Grant 4,787,047 - Wei November 22, 1 | 1988-11-22 |
| Monolithic voltage divider Grant 4,433,282 - Squires February 21, 1 | 1984-02-21 |
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