Institute for the Development of Emerging Architectures, L.L.C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Institute for the Development of Emerging Architectures, L.L.C..The latest application filed is for "method and apparatus for managing access to out-of-frame registers".

Company Profile

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Institute for the Development of Emerging Architectures, L.L.C. - Cupertino CA
Institute for the Development of Emerging Architectures LLC - Cupertino CA
Institute for the Development of Emerging Architectures, L.L.C. - Palo Alto CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus for managing access to out-of-frame Registers Grant 6,665,793 - Zahir , et al. December 16, 2	2003-12-16
Advanced load address table entry invalidation based on register address wraparound Grant 6,631,460 - Morris , et al. October 7, 2	2003-10-07
Methods and apparatus for controlling exponent range in floating-point calculations Grant 6,578,059 - Huck , et al. June 10, 2	2003-06-10
Execution of an instruction to load two independently selected registers in a single cycle Grant 6,408,380 - Huck , et al. June 18, 2	2002-06-18
Method and apparatus for calculating a page table index from a virtual address Grant 6,393,544 - Bryg , et al. May 21, 2	2002-05-21
Use of dynamic translation to provide breakpoints in non-writeable object code Grant 6,330,691 - Buzbee , et al. December 11, 2	2001-12-11
System and method for deferring exceptions generated during speculative execution Grant 6,301,705 - Doshi , et al. October 9, 2	2001-10-09
Method and apparatus for constructing a stack unwind data structure Grant 6,293,712 - Coutant September 25, 2	2001-09-25
Method for identifying hard-to-predict branches to enhance processor performance Grant 6,269,438 - Chang July 31, 2	2001-07-31
Methods and apparatus for efficient control of floating-point status register Grant 6,151,669 - Huck , et al. November 21, 2	2000-11-21
Method and apparatus for prefetching data in a computer system Grant 6,119,218 - Arora , et al. September 12, 2	2000-09-12
High-performance processor with streaming buffer that facilitates prefetching of instructions Grant 6,012,134 - McInerney , et al. January 4, 2	2000-01-04
Emulating agent and method for reformatting computer instructions into a standard uniform format Grant 6,009,263 - Golliver , et al. December 28, 1	1999-12-28
Processor utilizing a template field for encoding instruction sequences in a wide-word format Grant 5,922,065 - Hull , et al. July 13, 1	1999-07-13
Computer architecture for the deferral of exceptions on speculative instructions Grant 5,915,117 - Ross , et al. June 22, 1	1999-06-22
Method and apparatus for address disambiguation using address component identifiers Grant 5,848,256 - Call , et al. December 8, 1	1998-12-08
Use of dynamic translation to collect and exploit run-time information in an optimizing compilation system Grant 5,815,720 - Buzbee September 29, 1	1998-09-29
Instruction prefetch mechanism utilizing a branch predict instruction Grant 5,742,804 - Yeh , et al. April 21, 1	1998-04-21
Cache arrangement including coalescing buffer queue for non-cacheable data Grant 5,664,148 - Mulla , et al. September 2, 1	1997-09-02
Method and apparatus for handling snoops in multiprocessor caches having internal buffer queues Grant 5,652,859 - Mulla , et al. July 29, 1	1997-07-29

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