loadpatents
name:-0.019510984420776
name:-0.023368120193481
name:-0.0026779174804688
Indyk; Richard F. Patent Filings

Indyk; Richard F.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Indyk; Richard F..The latest application filed is for "polygon integrated circuit (ic) packaging".

Company Profile
2.20.17
  • Indyk; Richard F. - Saratoga Springs NY
  • Indyk; Richard F. - Wappingers Falls NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Polygon integrated circuit (IC) packaging
Grant 11,410,894 - Arvin , et al. August 9, 2
2022-08-09
Polygon Integrated Circuit (ic) Packaging
App 20210074599 - Arvin; Charles L. ;   et al.
2021-03-11
Stress-resilient chip structure and dicing process
Grant 10,211,175 - Indyk , et al. Feb
2019-02-19
Edge trim processes and resultant structures
Grant 10,134,577 - Indyk , et al. November 20, 2
2018-11-20
Dicing channels for glass interposers
Grant 10,090,255 - Hedrick , et al. October 2, 2
2018-10-02
Structure for establishing interconnects in packages using thin interposers
Grant 10,002,835 - Fasano , et al. June 19, 2
2018-06-19
Dicing Channels For Glass Interposers
App 20170221837 - Hedrick; Brittany L. ;   et al.
2017-08-03
Method And Structure For Establishing Interconnects In Packages Using Thin Interposers
App 20170148737 - FASANO; Benjamin V. ;   et al.
2017-05-25
Method for establishing interconnects in packages using thin interposers
Grant 9,607,973 - Fasano , et al. March 28, 2
2017-03-28
Edge Trim Processes And Resultant Structures
App 20160343564 - INDYK; Richard F. ;   et al.
2016-11-24
Stress-resilient Chip Structure And Dicing Process
App 20150001714 - Indyk; Richard F. ;   et al.
2015-01-01
Stress-resilient Chip Structure And Dicing Process
App 20140151879 - Indyk; Richard F. ;   et al.
2014-06-05
Wafer dicing employing edge region underfill removal
Grant 8,652,941 - Indyk , et al. February 18, 2
2014-02-18
Wafer Dicing Employing Edge Region Underfill Removal
App 20130149841 - Indyk; Richard F. ;   et al.
2013-06-13
High tin solder etching solution
Grant 7,897,059 - Indyk , et al. March 1, 2
2011-03-01
Method and structure to improve thermal dissipation from semiconductor devices
Grant 7,724,527 - Coico , et al. May 25, 2
2010-05-25
High Tin Solder Etching Solution
App 20090120999 - Indyk; Richard F. ;   et al.
2009-05-14
Method and structure to improve thermal dissipation from semiconductor devices
Grant 7,468,886 - Coico , et al. December 23, 2
2008-12-23
Method And Structure To Improve Thermal Dissipation From Semiconductor Devices
App 20080310117 - Coico; Patrick A. ;   et al.
2008-12-18
Method And Structure To Improve Thermal Dissipation From Semiconductor Devices
App 20080218971 - Coico; Patrick A. ;   et al.
2008-09-11
Surface Treatments For Underfill Control
App 20070099346 - Farooq; Mukta ;   et al.
2007-05-03
Method to produce low strength temporary solder joints
Grant 7,087,513 - Fasano , et al. August 8, 2
2006-08-08
Method To Produce Low Strength Temporary Solder Joints
App 20060088997 - Fasano; Benjamin V. ;   et al.
2006-04-27
Temporary chip attach method using reworkable conductive adhesive interconnections
App 20060014309 - Sachdev; Krishna Gandhi ;   et al.
2006-01-19
Method and apparatus to form a reworkable seal on an electronic module
Grant 6,955,543 - Messina , et al. October 18, 2
2005-10-18
Method And Apparatus To Form A Reworkable Seal On An Electronic Module
App 20050037640 - Messina, Gaetano P. ;   et al.
2005-02-17
Method to produce pedestal features in constrained sintered substrates
Grant 6,835,260 - Fasano , et al. December 28, 2
2004-12-28
Method of selective plating on a substrate
Grant 6,823,585 - LaPlante , et al. November 30, 2
2004-11-30
Selective plating using dual lift-off mask
App 20040187303 - LaPlante, Mark J. ;   et al.
2004-09-30
Method to produce pedestal features in constrained sintered substrates
App 20040065401 - Fasano, Benjamin V. ;   et al.
2004-04-08
Method of forming defect-free ceramic structures using thermally depolymerizable surface layer
Grant 6,597,058 - Natarajan , et al. July 22, 2
2003-07-22
Multilayer ceramic substrate with anchored pad
Grant 6,312,791 - Fasano , et al. November 6, 2
2001-11-06
Method for producing ceramic surfaces with easily removable contact sheets
Grant 6,139,666 - Fasano , et al. October 31, 2
2000-10-31
Ceramic substrate having a sealed layer
Grant 6,136,419 - Fasano , et al. October 24, 2
2000-10-24
Structure to reduce stress in multilayer ceramic substrates
Grant 5,700,549 - Garant , et al. December 23, 1
1997-12-23

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