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Power efficient processor architecture
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Power Efficient Processor Architecture
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Power efficient processor architecture
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Interrupt Return Instruction With Embedded Interrupt Service Functionality
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Power Efficient Processor Architecture
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Power Efficient Processor Architecture
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Power Efficient Processor Architecture
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Application Scheduling In Heterogeneous Multiprocessor Computing Platforms
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Application scheduling in heterogeneous multiprocessor computing platform based on a ratio of predicted performance of processor cores
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Device-based Personal Speech Recognition Training
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Optimized Fast Hessian Matrix Computation Architecture
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Optimized fast hessian matrix computation architecture
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System And Method For Adaptive Skin Tone Detection
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Processor Accelerator Interface Virtualization
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Method and apparatus for connecting packet telephony calls between secure and non-secure networks
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Power Efficient Processor Architecture
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Efficient Peer-to-peer Communication Support In Soc Fabrics
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Monitoring cache usage in a distributed shared cache
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Method, Apparatus, And System For Energy Efficiency And Energy Conservation Including Dynamic C0-state Cache Resizing
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Optimized Fast Hessian Matrix Computation Architecture
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Application Scheduling In Heterogeneous Multiprocessor Computing Platforms
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Methods And Apparatuses For Controlling Cache Occupancy Rates
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Performing direct cache access transactions based on a memory access data structure
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Monitoring cache usage in a distributed shared cache
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Method And Apparatus For Connecting Packet Telephony Calls Between Secure And Non-secure Networks
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Method and apparatus for connecting packet telephony calls between secure and non-secure networks
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Exposing System Topology To The Execution Environment
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Speculative Prefetch Of Protocol Control Information From An External Memory Unit
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Method and apparatus for connecting packet telephony calls between secure and non-secure networks
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