loadpatents
name:-0.0066289901733398
name:-0.038881063461304
name:-0.00062417984008789
Ikeda; Takahide Patent Filings

Ikeda; Takahide

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ikeda; Takahide.The latest application filed is for "semiconductor device and process of producing the same".

Company Profile
0.32.5
  • Ikeda; Takahide - Tokorozawa JP
  • Ikeda, Takahide - Tokorozawa-shi JP
  • Ikeda; Takahide - Tokorosawa-shi Saitama JP
  • Ikeda; Takahide - Tokorosawa JP
  • Ikeda; Takahide - Kodaira JA
  • Ikeda; Takahide - Kokubunji-shi JA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor device and process of producing the same
Grant 7,238,582 - Shimamoto , et al. July 3, 2
2007-07-03
Semiconductor device and process of producing the same
App 20050101097 - Shimamoto, Hiromi ;   et al.
2005-05-12
Semiconductor memory device
Grant 6,864,559 - Nakazato , et al. March 8, 2
2005-03-08
Semiconductor device and process of producing the same
Grant 6,835,632 - Shimamoto , et al. December 28, 2
2004-12-28
Semiconductor memory device
Grant 6,740,958 - Nakazato , et al. May 25, 2
2004-05-25
Semiconductor device
Grant 6,727,152 - Mitani , et al. April 27, 2
2004-04-27
Semiconductor device and process of producing the same
App 20030207544 - Shimamoto, Hiromi ;   et al.
2003-11-06
Semiconductor memory device
App 20030178699 - Nakazato, Shinji ;   et al.
2003-09-25
Semiconductor device and process of producing the same
Grant 6,610,569 - Shimamoto , et al. August 26, 2
2003-08-26
Semiconductor memory device
App 20020153591 - Nakazato, Shinji ;   et al.
2002-10-24
Semiconductor device
App 20020096718 - Mitani, Shinichiro ;   et al.
2002-07-25
Semiconductor memory device
Grant 6,208,010 - Nakazato , et al. March 27, 2
2001-03-27
Method of manufacturing an improved SOI (silicon-on-insulator) semiconductor integrated circuit device
Grant 6,063,686 - Masuda , et al. May 16, 2
2000-05-16
Semiconductor device having conducting structure
Grant 5,793,097 - Shimamoto , et al. August 11, 1
1998-08-11
Semiconductor integrated circuit device including an improved separating groove arrangement
Grant 5,661,329 - Hiramoto , et al. August 26, 1
1997-08-26
Process for producing a bipolar device
Grant 5,643,805 - Ohta , et al. July 1, 1
1997-07-01
Bipolar device and production thereof
Grant 5,619,069 - Ohta , et al. April 8, 1
1997-04-08
Semiconductor memory device having separately biased wells for isolation
Grant 5,497,023 - Nakazato , et al. March 5, 1
1996-03-05
Semiconductor CMOS memory device with separately biased wells
Grant 5,386,135 - Nakazato , et al. January 31, 1
1995-01-31
Method of manufacturing semiconductor integrated circuit device
Grant 5,354,699 - Ikeda , et al. October 11, 1
1994-10-11
Semiconductor memory device having bipolar transistor and structure to avoid soft error
Grant 5,324,982 - Nakazato , et al. June 28, 1
1994-06-28
BiCMOS semiconductor memory device using load transistors formed on an insulating film
Grant 5,321,650 - Kikuchi , et al. June 14, 1
1994-06-14
Semiconductor memory device
Grant 5,148,255 - Nakazato , et al. September 15, 1
1992-09-15
Semiconductor integrated circuit device
Grant 5,057,894 - Ikeda , et al. October 15, 1
1991-10-15
Method of manufacturing a semiconductor device utilizing a single polycrystalline layer for all electrodes
Grant 5,026,654 - Tanba , et al. June 25, 1
1991-06-25
Semiconductor circuit device having a plurality of SRAM type memory cell arrangement
Grant 4,984,200 - Saitoo , et al. January 8, 1
1991-01-08
Semiconductor integrated circuit device and a method for manufacturing the same
Grant 4,980,744 - Watanabe , et al. December 25, 1
1990-12-25
Semiconductor device
Grant 4,963,973 - Watanabe , et al. October 16, 1
1990-10-16
Semiconductor integrated circuit device and a method for manufacturing the same
Grant 4,921,811 - Watanabe , et al. May 1, 1
1990-05-01
Complementary semiconductor device
Grant 4,862,240 - Watanabe , et al. August 29, 1
1989-08-29
MOS/bipolar device with stepped buried layer under active regions
Grant 4,799,098 - Ikeda , et al. January 17, 1
1989-01-17
Method of making a stacked emitter in a bipolar transistor by selective laser irradiation
Grant 4,377,421 - Wada , et al. March 22, 1
1983-03-22
High power semiconductor diode
Grant 4,089,020 - Ikeda , et al. May 9, 1
1978-05-09
Insulated gate field effect transistor having drain region containing low impurity concentration layer
Grant 4,005,450 - Yoshida , et al. January 25, 1
1977-01-25
Insulated Gate Field Effect Transistors And Method Of Producing The Same
Grant 3,787,962 - Yoshida , et al. January 29, 1
1974-01-29
Method For Fabricating Semiconductor Devices By Ion Implantation
Grant 3,615,875 - Morita , et al. October 26, 1
1971-10-26
Method Of Forming A Junction By Ion Implantation
Grant 3,607,449 - Tokuyama , et al. September 21, 1
1971-09-21

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed