loadpatents
name:-0.019369840621948
name:-0.014604806900024
name:-0.00050806999206543
Ichinomiya; Takahiro Patent Filings

Ichinomiya; Takahiro

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ichinomiya; Takahiro.The latest application filed is for "semiconductor integrated circuit and power supply control system provided with a plurality of semiconductor integrated circuits".

Company Profile
0.12.14
  • Ichinomiya; Takahiro - Osaka JP
  • Ichinomiya; Takahiro - Katano JP
  • Ichinomiya; Takahiro - Katano-shi JP
  • Ichinomiya; Takahiro - Takatsuki JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor integrated circuit and power supply control system provided with a plurality of semiconductor integrated circuits
Grant 9,880,572 - Okajima , et al. January 30, 2
2018-01-30
Semiconductor Integrated Circuit And Power Supply Control System Provided With A Plurality Of Semiconductor Integrated Circuits
App 20170336816 - OKAJIMA; Yoshinori ;   et al.
2017-11-23
Semiconductor integrated circuit and power supply control system provided with a plurality of semiconductor integrated circuits
Grant 9,766,640 - Okajima , et al. September 19, 2
2017-09-19
Semiconductor Integrated Circuit And Power Supply Control System Provided With A Plurality Of Semiconductor Integrated Circuits
App 20160179111 - OKAJIMA; Yoshinori ;   et al.
2016-06-23
Fabrication system of semiconductor integrated circuit, fabrication device, fabrication method, integrated circuit and communication system
Grant 8,271,117 - Ichinomiya , et al. September 18, 2
2012-09-18
Semiconductor integrated circuit, semiconductor integrated circuit control method, and terminal system
Grant 8,143,913 - Ichinomiya March 27, 2
2012-03-27
Reconfigurable computing circuit
Grant 7,996,657 - Maeda , et al. August 9, 2
2011-08-09
Fabrication System Of Semiconductor Integrated Circuit, Fabrication Device, Fabrication Method, Integrated Circuit And Communication System
App 20100100219 - Ichinomiya; Takahiro ;   et al.
2010-04-22
Reconfigurable Computing Circuit
App 20090327653 - MAEDA; Masaki ;   et al.
2009-12-31
Semiconductor Integrated Circuit, Semiconductor Integrated Circuit Control Method, And Terminal System
App 20090273366 - Ichinomiya; Takahiro
2009-11-05
Logic block control system and logic block control method
Grant 7,579,864 - Ichinomiya August 25, 2
2009-08-25
Logic Block Control System And Logic Block Control Method
App 20090115452 - Ichinomiya; Takahiro
2009-05-07
Method Of Designing Semiconductor Integrated Circuit In Which Fault Detection Can Be Effected Through Scan-in And Scan-out
App 20090106721 - TAKEOKA; Sadami ;   et al.
2009-04-23
Method of designing a semiconductor integrated circuit
Grant 7,480,875 - Satoh , et al. January 20, 2
2009-01-20
Clock supply circuit
Grant 7,336,116 - Hirata , et al. February 26, 2
2008-02-26
Design method for semiconductor integrated circuit suppressing power supply noise
Grant 7,278,124 - Shimazaki , et al. October 2, 2
2007-10-02
Operation analyzing method for semiconductor integrated circuit device, analyzing system used in the same, and optimization design method using the same
Grant 7,225,418 - Shimazaki , et al. May 29, 2
2007-05-29
Clock supply circuit
App 20060170479 - Hirata; Akio ;   et al.
2006-08-03
Method of designing a semiconductor integrated circuit
App 20060143585 - Satoh; Kazuhiro ;   et al.
2006-06-29
Method of designing semiconductor integrated circuit utilizing a scan test function
Grant 7,017,135 - Takeoka , et al. March 21, 2
2006-03-21
Delay calculation method, timing analysis method, calculation object network approximation method, and delay control method
App 20050256921 - Amekawa, Naoki ;   et al.
2005-11-17
Design method for semiconductor integrated circuit suppressing power supply noise
App 20050149894 - Shimazaki, Kenji ;   et al.
2005-07-07
Method for analyzing power supply noise of semiconductor integrated circuit
App 20050114054 - Shimazaki, Kenji ;   et al.
2005-05-26
Operation analyzing method for semiconductor integrated circuit device, analyzing system used in the same, and optimization design method using the same
App 20040249588 - Shimazaki, Kenji ;   et al.
2004-12-09
Method of layout for LSI
Grant 6,440,780 - Kimura , et al. August 27, 2
2002-08-27
Method of edsigning semiconductor integrated circuit
App 20010021990 - Takeoka, Sadami ;   et al.
2001-09-13

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