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Hyperion Core, Inc. Patent Filings

Hyperion Core, Inc.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hyperion Core, Inc..The latest application filed is for "advanced processor architecture".

Company Profile
17.19.41
  • Hyperion Core, Inc. - Los Gatos CA
  • Hyperion Core, Inc. - Los Gators CA US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Advanced Processor Architecture
App 20210406027 - VORBACH; Martin
2021-12-30
High Performance Processor
App 20210286755 - Vorbach; Martin
2021-09-16
Advanced processor architecture
Grant 11,061,682 - Vorbach July 13, 2
2021-07-13
Issuing instructions to multiple execution units
Grant 10,908,914 - Vorbach , et al. February 2, 2
2021-02-02
Providing Code Sections For Matrix Of Arithmetic Logic Units In A Processor
App 20210026637 - VORBACH; Martin
2021-01-28
Issuing Instructions To Multiple Execution Units
App 20200241879 - VORBACH; Martin ;   et al.
2020-07-30
Optimization Of Loops And Data Flow Sections In Multi-core Processor Environment
App 20200042492 - VORBACH; Martin
2020-02-06
Execution Of Instructions Based On Processor And Data Availability
App 20190377580 - VORBACH; Martin ;   et al.
2019-12-12
Issuing instructions to multiple execution units
Grant 10,409,608 - Vorbach , et al. Sept
2019-09-10
Parallel Memory Systems
App 20190197015 - Vorbach; Martin
2019-06-27
Optimization of loops and data flow sections in multi-core processor environment
Grant 10,331,615 - Vorbach
2019-06-25
Tool-level And Hardware-level Code Optimization And Respective Hardware Modification
App 20190171449 - VORBACH; Martin
2019-06-06
Providing Code Sections For Matrix Of Arithmetic Logic Units In A Processor
App 20190079769 - VORBACH; Martin
2019-03-14
Parallel memory systems
Grant 10,031,888 - Vorbach July 24, 2
2018-07-24
Issuing Instructions To Multiple Execution Units
App 20180181403 - VORBACH; Martin ;   et al.
2018-06-28
Issuing instructions to multiple execution units
Grant 9,898,297 - Vorbach , et al. February 20, 2
2018-02-20
System And Method For A Cache In A Multi-core Processor
App 20180039576 - VORBACH; Martin
2018-02-08
Advanced Processor Architecture
App 20180004530 - VORBACH; Martin
2018-01-04
Tool-level And Hardware-level Code Optimization And Respective Hardware Modification
App 20170364338 - VORBACH; Martin
2017-12-21
Optimization Of Loops And Data Flow Sections In Multi-core Processor Environment
App 20170262406 - VORBACH; Martin
2017-09-14
System and method for a cache in a multi-core processor
Grant 9,734,064 - Vorbach August 15, 2
2017-08-15
Tool-level and hardware-level code optimization and respective hardware modification
Grant 9,703,538 - Vorbach July 11, 2
2017-07-11
Optimization of loops and data flow sections in multi-core processor environment
Grant 9,672,188 - Vorbach June 6, 2
2017-06-06
Providing Code Sections For Matrix Of Arithmetic Logic Units In A Processor
App 20160306631 - VORBACH; Martin
2016-10-20
Providing code sections for matrix of arithmetic logic units in a processor
Grant 9,348,587 - Vorbach May 24, 2
2016-05-24
Issuing Instructions To Multiple Execution Units
App 20160048394 - VORBACH; Martin ;   et al.
2016-02-18
System And Method For A Cache In A Multi-core Processor
App 20160004639 - VORBACH; Martin
2016-01-07
Optimization Of Loops And Data Flow Sections In Multi-core Processor Environment
App 20150301983 - Vorbach; Martin
2015-10-22
Instruction issue to array of arithmetic cells coupled to load/store cells with associated registers as extended register file
Grant 9,152,427 - Vorbach , et al. October 6, 2
2015-10-06
System and method for a cache in a multi-core processor
Grant 9,086,973 - Vorbach July 21, 2
2015-07-21
Optimization of loops and data flow sections in multi-core processor environment
Grant 9,043,769 - Vorbach May 26, 2
2015-05-26
Advanced Processor Architecture
App 20140351563 - Vorbach; Martin
2014-11-27
Tool-level And Hardware-level Code Optimization And Respective Hardware Modification
App 20140310696 - Vorbach; Martin
2014-10-16
Optimisation of loops and data flow sections
App 20130191817 - Vorbach; Martin
2013-07-25
Sequential Processor Comprising An Alu Array
App 20120216012 - Vorbach; Martin ;   et al.
2012-08-23
System and Method for a Cache in a Multi-Core Processor
App 20120137075 - Vorbach; Martin
2012-05-31

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