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name:-0.38381099700928
name:-0.091797828674316
name:-0.0033829212188721
HWANG; Wei Patent Filings

HWANG; Wei

Patent Applications and Registrations

Patent applications and USPTO patent grants for HWANG; Wei.The latest application filed is for "neural-signal amplifier and multi-channel neural-signal amplifying system".

Company Profile
1.80.43
  • HWANG; Wei - Hsinchu City TW
  • Hwang; Wei - Hsinchu TW
  • Hwang; Wei - Taipei N/A TW
  • Hwang; Wei - Taipei City TW
  • Hwang; Wei - Salarnanca La Verna CA
  • Hwang; Wei - La Verne CA
  • Hwang; Wei - La Vema CA
  • Hwang; Wei - Salamanca La Verna CA
  • Hwang; Wei - La Verna CA
  • Hwang; Wei - LeVerne CA
  • Hwang; Wei - Armonk NY
  • Hwang; Wei - Westchester County NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Neural-signal Amplifier And Multi-channel Neural-signal Amplifying System
App 20200178823 - LU; Hung-Pin ;   et al.
2020-06-11
Multi-port SRAM with shared write bit-line architecture and selective read path for low power operation
Grant 9,142,285 - Hwang , et al. September 22, 2
2015-09-22
Multi-port Sram With Shared Write Bit-line Architecture And Selective Read Path For Low Power Operation
App 20150170734 - HWANG; Wei ;   et al.
2015-06-18
Ten-transistor dual-port SRAM with shared bit-line architecture
Grant 8,891,289 - Hwang , et al. November 18, 2
2014-11-18
Static random access memory apparatus and bit-line voltage controller thereof
Grant 8,854,897 - Chuang , et al. October 7, 2
2014-10-07
Oscillato based on a 6T SRAM for measuring the bias temperature instability
Grant 8,804,445 - Chuang , et al. August 12, 2
2014-08-12
Ten-transistor Dual-port Sram With Shared Bit-line Architecture
App 20140198562 - HWANG; Wei ;   et al.
2014-07-17
Static random access memory with ripple bit lines/search lines for improving current leakage/variation tolerance and density/performance
Grant 8,773,894 - Chuang , et al. July 8, 2
2014-07-08
Static Random Access Memory With Ripple Bit Lines/search Lines For Imroving Current Leakage/variation Tolerance And Density/performance
App 20140078818 - CHUANG; Ching-Te ;   et al.
2014-03-20
Low power static random access memory
Grant 8,659,936 - Chuang , et al. February 25, 2
2014-02-25
Static Random Access Memory Apparatus And Bit-line Voltage Controller Thereof
App 20140009999 - Chuang; Ching-Te ;   et al.
2014-01-09
Oscillator based on a 6T SRAM for measuring the Bias Temperature Instability
App 20130222071 - Chuang; Ching-Te ;   et al.
2013-08-29
SRAM based on 6 transistor structure including a first inverter, a second inverter, a first pass-gate transistor, and a second pass-gate transistor
App 20130223136 - CHUANG; Ching-Te ;   et al.
2013-08-29
Dual-port subthreshold SRAM cell
Grant 8,498,174 - Chiu , et al. July 30, 2
2013-07-30
Method for buffering clock skew by using a logical effort
Grant 8,487,684 - Hsieh , et al. July 16, 2
2013-07-16
Static random access memory cell and method of operating the same
Grant 8,437,178 - Chiu , et al. May 7, 2
2013-05-07
On-chip active decoupling capacitors for regulating voltage of an integrated circuit
Grant 8,427,224 - Lin , et al. April 23, 2
2013-04-23
Fully-on-chip temperature, process, and voltage sensor system
Grant 8,419,274 - Chen , et al. April 16, 2
2013-04-16
Gate oxide breakdown-withstanding power switch structure
Grant 8,385,149 - Yang , et al. February 26, 2
2013-02-26
System And Method For Allocating Cache Memory
App 20130031327 - CHANG; Yung ;   et al.
2013-01-31
Method And Device For Decoding A Scalable Video Signal Utilizing An Inter-layer Prediction
App 20130028324 - CHANG; YUNG ;   et al.
2013-01-31
On-chip Active Decoupling Capacitors For Regulating Voltage Of An Integrated Circuit
App 20130027122 - LIN; TIEN-HUNG ;   et al.
2013-01-31
Data-aware dynamic supply random access memory
Grant 8,345,504 - Chuang , et al. January 1, 2
2013-01-01
Dual-port Subthreshold Sram Cell
App 20120307548 - Chiu; Yi-Te ;   et al.
2012-12-06
Static random access memory with data controlled power supply
Grant 8,320,164 - Chuang , et al. November 27, 2
2012-11-27
Static Random Access Memory Cell And Method Of Operating The Same
App 20120230086 - Chiu; Yi-Te ;   et al.
2012-09-13
Solar power management system
Grant 8,258,741 - Wu , et al. September 4, 2
2012-09-04
Disturb-free static random access memory cell
Grant 8,259,510 - Chuang , et al. September 4, 2
2012-09-04
Programmable clock generator used in dynamic-voltage-and-frequency-scaling (DVFS) operated in sub- and near- threshold region
Grant 8,237,477 - Hsieh , et al. August 7, 2
2012-08-07
Apparatus and Method for Sensing Temperature
App 20120170616 - Tsai; Kun-Ju ;   et al.
2012-07-05
Method For Buffering Clock Skew By Using A Logical Effort
App 20120169394 - Hsieh; Chung-Ying ;   et al.
2012-07-05
Gate Oxide Breakdown-withstanding Power Switch Structure
App 20120087196 - YANG; Hao-I ;   et al.
2012-04-12
Self-aware adaptive power control system and a method for determining the circuit state
Grant 8,138,795 - Hseih , et al. March 20, 2
2012-03-20
Fully-on-chip Temperature, Process, And Voltage Sensor System
App 20120051395 - CHEN; Shi-Wen ;   et al.
2012-03-01
Charge pump
Grant 8,125,263 - Wu , et al. February 28, 2
2012-02-28
Data-aware Dynamic Supply Random Access Memory
App 20120044779 - Chuang; Ching-Te ;   et al.
2012-02-23
Low Power Static Random Access Memory
App 20120008449 - Chuang; Ching-Te ;   et al.
2012-01-12
Static Random Access Memory With Data Controlled Power Supply
App 20120008377 - Chuang; Ching-Te ;   et al.
2012-01-12
Dual-threshold-voltage two-port sub-threshold SRAM cell apparatus
Grant 8,072,818 - Chang , et al. December 6, 2
2011-12-06
Charge Pump
App 20110221512 - WU; Chun-Yi ;   et al.
2011-09-15
Solar Power Management System
App 20110193515 - WU; CHUN-YI ;   et al.
2011-08-11
Disturb-free Static Random Access Memory Cell
App 20110128796 - Chuang; Ching-Te ;   et al.
2011-06-02
Butterfly match-line structure and search method implemented thereby
Grant 7,903,443 - Huang , et al. March 8, 2
2011-03-08
Pipeline-based reconfigurable mixed-radix FFT processor
Grant 7,849,123 - Lai , et al. December 7, 2
2010-12-07
Dual-threshold-voltage two-port sub-threshold SRAM cell apparatus
App 20100172194 - Chang; Mu-Tien ;   et al.
2010-07-08
Leakage current cut-off device for ternary content addressable memory
Grant 7,738,275 - Huang , et al. June 15, 2
2010-06-15
Super leakage current cut-off device for ternary content addressable memory
Grant 7,616,469 - Huang , et al. November 10, 2
2009-11-10
Leakage current cut-off device for ternary content addressable memory
App 20090161400 - Huang; Po-Tsang ;   et al.
2009-06-25
Super leakage current cut-off device for ternary content addressable memory
App 20090161399 - Huang; Po-Tsang ;   et al.
2009-06-25
Self-aware Adaptive Power Control System And A Method For Determining The Circuit State
App 20090158073 - HSIEH; Wei-Chih ;   et al.
2009-06-18
Stored don't-care based hierarchical search-line scheme
Grant 7,525,827 - Chang , et al. April 28, 2
2009-04-28
Butterfly Match-line Structure And Search Method Implemented Thereby
App 20080177944 - Huang; Po-Tsang ;   et al.
2008-07-24
Stored Don't-care Based Hierarchical Search-line Scheme
App 20080175030 - CHANG; Shu-Wei ;   et al.
2008-07-24
Pipeline-based reconfigurable mixed-radix FFT processor
App 20080155003 - Lai; Chi-Chen ;   et al.
2008-06-26
XOR-based conditional keeper and an architecture implementing its application to match lines
Grant 7,358,768 - Hua , et al. April 15, 2
2008-04-15
Comparator eliminating need for one's complement logic for signed numbers
Grant 7,284,028 - Hwang , et al. October 16, 2
2007-10-16
Asynchronous first-in-first-out cell
Grant 7,260,008 - Chu , et al. August 21, 2
2007-08-21
Clock switching circuit
Grant 7,259,598 - Wu , et al. August 21, 2
2007-08-21
Clock switching circuit
App 20070152719 - Wu; Jian-Hua ;   et al.
2007-07-05
XOR-based conditional keeper and an architecture implementing its application to match lines
App 20070103885 - Hua; Chung-Hsien ;   et al.
2007-05-10
Asynchronous first-in first-out cell
App 20070097771 - Chu; Yeh-Lin ;   et al.
2007-05-03
Power gating structure having data retention and intermediate modes
Grant 7,190,187 - Hua , et al. March 13, 2
2007-03-13
Power gating structure having data retention and intermediate modes
App 20060119393 - Hua; Chung-Hsien ;   et al.
2006-06-08
Configurable voltage generator
App 20050174162 - Cheng, Tung-Shuan ;   et al.
2005-08-11
Dual-type thin-film field-effect transistors and applications
Grant 6,890,766 - Doderer , et al. May 10, 2
2005-05-10
Comparator eliminating need for one's complement logic for signed numbers
App 20040088591 - Hwang, Wei ;   et al.
2004-05-06
Dual-type thin-film field-effect transistors and applications
App 20030201495 - Doderer, Thomas ;   et al.
2003-10-30
Merged logic and memory combining thin film and bulk Si transistors
Grant 6,620,659 - Emmma , et al. September 16, 2
2003-09-16
Data retention registers
Grant 6,437,623 - Hsu , et al. August 20, 2
2002-08-20
High performance semiconductor memory device with low power consumption
Grant 6,307,805 - Andersen , et al. October 23, 2
2001-10-23
Merged logic and memory combining thin film and bulk Si transistors
App 20010028059 - Emma, Philip George ;   et al.
2001-10-11
Decoupling capacitor structure distributed above an integrated circuit and method for making same
Grant 6,285,050 - Emma , et al. September 4, 2
2001-09-04
Provably correct storage arrays
Grant 6,279,144 - Henkels , et al. August 21, 2
2001-08-21
Merged logic and memory combining thin film and bulk Si transistors
Grant 6,271,542 - Emma , et al. August 7, 2
2001-08-07
Method and system for selecting sizes of components for integrated circuits
Grant 6,175,949 - Gristede , et al. January 16, 2
2001-01-16
Multi-threshold-voltage differential cascode voltage switch (DCVS) circuits
Grant 6,090,153 - Chen , et al. July 18, 2
2000-07-18
Design of provably correct storage arrays
Grant 5,995,425 - Henkels, deceased , et al. November 30, 1
1999-11-30
Emulating quasi-synchronous DRAM with asynchronous DRAM
Grant 5,901,304 - Hwang , et al. May 4, 1
1999-05-04
System-on-chip layout compilation
Grant 5,883,814 - Luk , et al. March 16, 1
1999-03-16
System integration of DRAM macros and logic cores in a single chip architecture
Grant 5,790,839 - Luk , et al. August 4, 1
1998-08-04
Cells and read-circuits for high-performance register files
Grant 5,481,495 - Henkels , et al. January 2, 1
1996-01-02
Bandgap voltage reference generator
Grant 5,453,953 - Dhong , et al. September 26, 1
1995-09-26
Method of forming double well substrate plate trench DRAM cell array
Grant 5,362,663 - Bronner , et al. November 8, 1
1994-11-08
Buried-sidewall-strap two transistor one capacitor trench cell
Grant 5,363,327 - November 8, 1
1994-11-08
Power supply tracking regulator for a memory array
Grant 5,359,552 - Dhong , et al. October 25, 1
1994-10-25
Folder Bitline DRAM having access transistors stacked above trench storage capacitors, each such transistor employing a planar semiconductor body which spans adjacent capacitors
Grant 5,336,629 - Dhong , et al. August 9, 1
1994-08-09
Forming a bit line configuration for semiconductor memory
Grant 5,292,678 - Dhong , et al. March 8, 1
1994-03-08
Power supply tracking regulator for a memory array
Grant 5,268,871 - Dhong , et al. December 7, 1
1993-12-07
Word line driver circuit for dynamic random access memories
Grant 5,253,202 - Bronner , et al. October 12, 1
1993-10-12
Folded bitline, ultra-high density dynamic random access memory having access transistors stacked above trench storage capacitors
Grant 5,214,603 - Dhong , et al. May 25, 1
1993-05-25
High speed dynamic, random access memory with extended reset/precharge time
Grant 5,185,719 - Dhong , et al. February 9, 1
1993-02-09
Bit line configuration for semiconductor memory
Grant 5,170,243 - Dhong , et al. December 8, 1
1992-12-08
DRAM having extended refresh time
Grant 5,157,634 - Dhong , et al. October 20, 1
1992-10-20
CMOS off-chip driver circuits
Grant 5,144,165 - Dhong , et al. September 1, 1
1992-09-01
Stacked bit-line architecture for high density cross-point memory cell array
Grant 5,107,459 - Chu , et al. April 21, 1
1992-04-21
PMOS wordline boost cricuit for DRAM
Grant 5,075,571 - Dhong , et al. December 24, 1
1991-12-24
Fabrication method for a double trench memory cell device
Grant 5,064,777 - Dhong , et al. November 12, 1
1991-11-12
Structure and fabrication method for a double trench memory cell device
Grant 5,034,787 - Dhong , et al. July 23, 1
1991-07-23
Method of fabricating cross-point lightly-doped drain-source trench transistor
Grant 5,021,355 - Dhong , et al. June 4, 1
1991-06-04
Method for fabricating a mesa transistor-trench capacitor memory cell structure
Grant 4,988,637 - Dhong , et al. January 29, 1
1991-01-29
Wordline voltage boosting circuits for complementary MOSFET dynamic memories
Grant 4,954,731 - Dhong , et al. September 4, 1
1990-09-04
Cross-point lightly-doped drain-source trench transistor and fabrication process therefor
Grant 4,954,854 - Dhong , et al. September 4, 1
1990-09-04
Boost clock circuit for driving redundant wordlines and sample wordlines
Grant 4,922,128 - Dhong , et al. May 1, 1
1990-05-01
Integrated trench-transistor structure and fabrication process
Grant 4,881,105 - Davari , et al. November 14, 1
1989-11-14
High density memory cell structure having a vertical trench transistor self-aligned with a vertical trench capacitor and fabrication methods therefor
Grant 4,833,516 - Hwang , et al. May 23, 1
1989-05-23
High density vertical trench transistor and capacitor memory cell structure and fabrication method therefor
Grant 4,816,884 - Hwang , et al. March 28, 1
1989-03-28
Method and structure for a high density VMOS dynamic ram array
Grant 4,763,180 - Hwang , et al. August 9, 1
1988-08-09
Dynamic ram having multiplexed twin I/O line pairs
Grant 4,754,433 - Chin , et al. June 28, 1
1988-06-28

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