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Patent applications and USPTO patent grants for Hwang; Ting-Ting.The latest application filed is for "apparatus of three-dimensional integrated-circuit chip using fault-tolerant test through-silicon-via".
Patent | Date |
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Apparatus of three-dimensional integrated-circuit chip using fault-tolerant test through-silicon-via Grant 9,304,167 - Hwang , et al. April 5, 2 | 2016-04-05 |
Apparatus of Three-Dimensional Integrated-Circuit Chip Using Fault-Tolerant Test Through-Silicon-Via App 20150185274 - Hwang; Ting-Ting ;   et al. | 2015-07-02 |
Stacked multi-chip Grant 8,174,126 - Hwang , et al. May 8, 2 | 2012-05-08 |
Stacked Multi-chip App 20120007251 - Hwang; Ting-Ting ;   et al. | 2012-01-12 |
Method for crosstalk elimination and bus architecture performing the same App 20070271535 - Hwang; Ting Ting ;   et al. | 2007-11-22 |
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