loadpatents
name:-0.019566059112549
name:-0.011553764343262
name:-0.0024659633636475
Hwang; Jeonghyun Patent Filings

Hwang; Jeonghyun

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hwang; Jeonghyun.The latest application filed is for "transistor with multi-level self-aligned gate and source/drain terminals and methods".

Company Profile
1.9.14
  • Hwang; Jeonghyun - Ithaca NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Transistor With Multi-level Self-aligned Gate And Source/drain Terminals And Methods
App 20220223694 - Kantarovsky; Johnatan A. ;   et al.
2022-07-14
Implanted Isolation For Device Integration On A Common Substrate
App 20220173233 - Adusumilli; Siva P. ;   et al.
2022-06-02
Symmetric Arrangement Of Field Plates In Semiconductor Devices
App 20220165853 - KANTAROVSKY; JOHNATAN AVRAHAM ;   et al.
2022-05-26
Symmetric arrangement of field plates in semiconductor devices
Grant 11,316,019 - Kantarovsky , et al. April 26, 2
2022-04-26
DEVICE INTEGRATION SCHEMES LEVERAGING A BULK SEMICONDUCTOR SUBSTRATE HAVING A <111> CRYSTAL ORIENTATION
App 20220122963 - Levy; Mark ;   et al.
2022-04-21
Integrated Circuit Structure With Semiconductor-based Isolation Structure And Methods To Form Same
App 20220044960 - Stamper; Anthony K. ;   et al.
2022-02-10
Symmetric Arrangement Of Field Plates In Semiconductor Devices
App 20220037482 - KANTAROVSKY; JOHNATAN AVRAHAM ;   et al.
2022-02-03
Heterojunction Bipolar Transistor
App 20210384297 - ALDRIDGE, JR.; Henry L. ;   et al.
2021-12-09
Integrated circuit structure with semiconductor-based isolation structure and methods to form same
Grant 11,177,158 - Stamper , et al. November 16, 2
2021-11-16
Heterojunction bipolar transistor
Grant 11,177,345 - Aldridge, Jr. , et al. November 16, 2
2021-11-16
Integrated Circuit Structure With Semiconductor-based Isolation Structure And Methods To Form Same
App 20210265198 - Stamper; Anthony K. ;   et al.
2021-08-26
Highly doped III-nitride semiconductors
Grant 7,993,938 - Schaff , et al. August 9, 2
2011-08-09
Method of forming an AlN coated heterojunction field effect transistor
Grant 7,622,322 - Schaff , et al. November 24, 2
2009-11-24
Highly Doped Iii-nitride Semiconductors
App 20090165816 - Schaff; William J. ;   et al.
2009-07-02
Highly doped III-nitride semiconductors
Grant 7,485,901 - Schaff , et al. February 3, 2
2009-02-03
Highly doped III-nitride semiconductors
Grant 7,482,191 - Schaff , et al. January 27, 2
2009-01-27
Highly doped III-nitride semiconductors
Grant 6,953,740 - Schaff , et al. October 11, 2
2005-10-11
Highly doped III-nitride semiconductors
App 20050179047 - Schaff, William J. ;   et al.
2005-08-18
Highly doped III-nitride semiconductors
App 20050179050 - Schaff, William J. ;   et al.
2005-08-18
Highly doped III-nitride semiconductors
Grant 6,888,170 - Schaff , et al. May 3, 2
2005-05-03
Highly doped III-nitride semiconductors
App 20030176003 - Schaff, William J. ;   et al.
2003-09-18
Highly doped III-nitride semiconductors
App 20030173578 - Schaff, William J. ;   et al.
2003-09-18
AIN coated heterojunction field effect transistor and method of forming an AIN coating
App 20020137236 - Schaff, William J. ;   et al.
2002-09-26

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