Huy; Katja

Patent Applications and Registrations

Patent applications and USPTO patent grants for Huy; Katja.The latest application filed is for "spacer for a gate electrode having tensile stress and a method of forming the same".

Company Profile

0.9.9

Huy; Katja - Dresden DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Spacer for a gate electrode having tensile stress and a method of forming the same Grant 8,847,205 - Ruelke , et al. September 30, 2	2014-09-30
Spacer For A Gate Electrode Having Tensile Stress And A Method Of Forming The Same App 20140011302 - Ruelke; Hartmut ; et al.	2014-01-09
Spacer for a gate electrode having tensile stress and a method of forming the same Grant 8,557,667 - Rulke , et al. October 15, 2	2013-10-15
Method of improving the wafer-to-wafer thickness uniformity of silicon nitride layers Grant 8,084,088 - Huy , et al. December 27, 2	2011-12-27
Method of forming a TEOS cap layer at low temperature and reduced deposition rate Grant 7,807,233 - Ruelke , et al. October 5, 2	2010-10-05
Method for forming a tungsten interconnect structure with enhanced sidewall coverage of the barrier layer Grant 7,442,638 - Frohberg , et al. October 28, 2	2008-10-28
Nitrogen-free ARC layer and a method of manufacturing the same Grant 7,326,646 - Ruelke , et al. February 5, 2	2008-02-05
Semiconductor Device Comprising Copper-based Contact Plug And A Method Of Forming The Same App 20070096221 - Frohberg; Kai ; et al.	2007-05-03
Method For Forming A Tungsten Interconnect Structure With Enhanced Sidewall Coverage Of The Barrier Layer App 20070077749 - Frohberg; Kai ; et al.	2007-04-05
Technique for forming a spacer for a line element by using an etch stop layer deposited by a highly directional deposition technique Grant 7,109,086 - Kammler , et al. September 19, 2	2006-09-19
Technique for forming recessed sidewall spacers for a polysilicon line Grant 7,005,358 - Kammler , et al. February 28, 2	2006-02-28
Nitrogen-free ARC layer and a method of manufacturing the same App 20050208755 - Ruelke, Hartmut ; et al.	2005-09-22
Technique for forming a spacer for a line element by using an etch stop layer deposited by a highly directional deposition technique App 20050142828 - Kammler, Thorsten ; et al.	2005-06-30
Spacer for a gate electrode having tensile stress and a method of forming the same App 20050136606 - Rulke, Hartmut ; et al.	2005-06-23
Method of forming a teos cap layer at low temperature and reduced deposition rate App 20050048222 - Ruelke, Hartmut ; et al.	2005-03-03
Method of improving the wafer-to-wafer thickness uniformity of silicon nitride layers App 20050026434 - Huy, Katja ; et al.	2005-02-03
Technique for forming recessed sidewall spacers for a polysilicon line App 20050026380 - Kammler, Thorsten ; et al.	2005-02-03

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