HURD; Trace Q.

Patent Applications and Registrations

Patent applications and USPTO patent grants for HURD; Trace Q..The latest application filed is for "semiconductor device with gate-undercutting recessed region".

Company Profile

1.9.11

HURD; Trace Q. - Plano TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor Device With Gate-undercutting Recessed Region App 20110316089 - PACHECO ROTONDARO; Antonio Luis ; et al.	2011-12-29
Semiconductor Device With Gate-undercutting Recessed Region App 20110318901 - ROTONDARO; Antonio Luis Pacheco ; et al.	2011-12-29
Semiconductor device with gate-undercutting recessed region Grant 8,049,254 - Pacheco Rotondaro , et al. November 1, 2	2011-11-01
Semiconductor Device With Gate-undercutting Recessed Region App 20090174005 - Pacheco Rotondaro; Antonio Luis ; et al.	2009-07-09
Crystallographic preferential etch to define a recessed-region for epitaxial growth Grant 7,528,072 - Rotondaro , et al. May 5, 2	2009-05-05
Multi-step process for patterning a metal gate electrode Grant 7,422,969 - Rotondaro , et al. September 9, 2	2008-09-09
Silicon recess improvement through improved post implant resist removal and cleans Grant 7,371,691 - Hall , et al. May 13, 2	2008-05-13
Multi-step process for patterning a metal gate electrode Grant 7,323,403 - Rotondaro , et al. January 29, 2	2008-01-29
Multi-Step Process for Patterning a Metal Gate Electrode App 20080020558 - Rotondaro; Antonio L.P. ; et al.	2008-01-24
Crystallographic Preferential Etch To Define A Recessed-region For Epitaxial Growth App 20070249168 - Rotondaro; Antonio Luis Pacheco ; et al.	2007-10-25
Versatile system for wafer edge remediation Grant 7,195,679 - Xia , et al. March 27, 2	2007-03-27
Multi-step process for patterning a metal gate electrode App 20060115972 - Rotondaro; Antonio L.P. ; et al.	2006-06-01
Method to reduce silanol and improve barrier properties in low k dielectric ic interconnects Grant 7,037,823 - Matz , et al. May 2, 2	2006-05-02
Surface treatment of copper to improve interconnect formation Grant 6,995,088 - Aggarwal , et al. February 7, 2	2006-02-07
Silicon recess improvement through improved post implant resist removal and cleans App 20060024972 - Hall; Lindsey H. ; et al.	2006-02-02
Surface treatment of copper to improve interconnect formation App 20050260853 - Aggarwal, Sanjeev ; et al.	2005-11-24
Method to reduce silanol and improve barrier properties in low K dielectric IC interconnects App 20050233586 - Matz, Phillip D. ; et al.	2005-10-20
Versatile system for wafer edge remediation App 20040255985 - Xia, Changfeng ; et al.	2004-12-23
Contamination control for embedded ferroelectric device fabrication processes Grant 6,709,875 - Gilbert , et al. March 23, 2	2004-03-23
Contamination control for embedded ferroelectric device fabrication processes App 20030036209 - Gilbert, Stephen R. ; et al.	2003-02-20

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