loadpatents
name:-0.010329961776733
name:-0.0079290866851807
name:-0.0079591274261475
Hunt; John Richard Patent Filings

Hunt; John Richard

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hunt; John Richard.The latest application filed is for "semiconductor device packages and stacked package assemblies including high density interconnections".

Company Profile
9.8.9
  • Hunt; John Richard - Kaohsiung TW
  • Hunt; John Richard - Chandler AZ
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor device packages and stacked package assemblies including high density interconnections
Grant 10,916,429 - Hunt , et al. February 9, 2
2021-02-09
Stacked semiconductor package assemblies including double sided redistribution layers
Grant 10,886,263 - Chen , et al. January 5, 2
2021-01-05
Semiconductor Device Packages And Stacked Package Assemblies Including High Density Interconnections
App 20200111671 - HUNT; John Richard ;   et al.
2020-04-09
Semiconductor device packages and stacked package assemblies including high density interconnections
Grant 10,535,521 - Hunt , et al. Ja
2020-01-14
Semiconductor device packages and stacked package assemblies including high density interconnections
Grant 10,515,806 - Hunt , et al. Dec
2019-12-24
Semiconductor Device Packages And Stacked Package Assemblies Including High Density Interconnections
App 20190206683 - HUNT; John Richard ;   et al.
2019-07-04
Semiconductor Device Packages And Stacked Package Assemblies Including High Density Interconnections
App 20190206684 - HUNT; John Richard ;   et al.
2019-07-04
Semiconductor device packages and stacked package assemblies including high density interconnections
Grant 10,276,382 - Hunt , et al.
2019-04-30
Stacked Semiconductor Package Assemblies Including Double Sided Redistribution Layers
App 20190103386 - CHEN; William T. ;   et al.
2019-04-04
Semiconductor Device Packages And Stacked Package Assemblies Including High Density Interconnections
App 20180047571 - HUNT; John Richard ;   et al.
2018-02-15
Wafer Level Semiconductor Package And Manufacturing Methods Thereof
App 20160233169 - Hunt; John Richard
2016-08-11
Wafer level semiconductor package and manufacturing methods thereof
Grant 9,343,333 - Hunt May 17, 2
2016-05-17
Wafer Level Semiconductor Package And Manufacturing Methods Thereof
App 20150140737 - Hunt; John Richard
2015-05-21
Wafer level semiconductor package and manufacturing methods thereof
Grant 8,941,222 - Hunt January 27, 2
2015-01-27
Wafer Level Semiconductor Package And Manufacturing Methods Thereof
App 20120119373 - HUNT; JOHN RICHARD
2012-05-17
Semiconductor Package and Manufacturing Methods Thereof
App 20110127654 - Weng; Chaofu ;   et al.
2011-06-02

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed