loadpatents
name:-2.113049030304
name:-2.7856152057648
name:-1.3506999015808
Hung; Kei-Kang Patent Filings

Hung; Kei-Kang

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hung; Kei-Kang.The latest application filed is for "system for developing semiconductor device fabrication processes".

Company Profile
5.27.33
  • Hung; Kei-Kang - Hsinchu County TW
  • Hung; Kei Kang - Hefei CN
  • Hung; Kei-Kang - Changhua County TW
  • Hung; Kei-Kang - Fenyuan Township Changhua County TW
  • Hung; Kei-Kang - Changhua Hsien TW
  • Hung; Kei-Kang - Changhua TW
  • Hung, Kei-Kang - Fenyuan Shiang TW
  • Hung; Kei-Kang - Chutung Hsinchu TW
  • Hung, Kei-Kang - Fen-Yuan Hsiang TW
  • Hung; Kei-Kang - Chang-Hua Hsien TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and system for developing semiconductor device fabrication processes
Grant 11,347,210 - Hung May 31, 2
2022-05-31
Integral multifunction chip
Grant 11,257,828 - Hung February 22, 2
2022-02-22
System For Developing Semiconductor Device Fabrication Processes
App 20210325857 - HUNG; KEI-KANG
2021-10-21
Integral Multifunction Chip
App 20210313338 - HUNG; KEI-KANG
2021-10-07
Dynamic random access memory (DRAM) cell, DRAM device and storage method
Grant 10,957,375 - Hung , et al. March 23, 2
2021-03-23
Low-voltage Electrostatic Discharge (esd) Protection Circuit, Integrated Circuit And Method For Esd Protection Thereof
App 20200294992 - HUNG; Kei Kang ;   et al.
2020-09-17
Dynamic Random Access Memory (dram) Cell, Dram Device And Storage Method
App 20200286540 - HUNG; Kei Kang ;   et al.
2020-09-10
Method And System For Developing Semiconductor Device Fabrication Processes
App 20200241512 - HUNG; KEI-KANG
2020-07-30
Integral Multifunction Chip
App 20200243548 - HUNG; KEI-KANG
2020-07-30
Semiconductor device
Grant 9,773,770 - Hung , et al. September 26, 2
2017-09-26
Transient voltage suppressor and ESD protection device and array thereof
Grant 9,741,708 - Hung , et al. August 22, 2
2017-08-22
Transmitter, common mode transceiver using the same, and operating method thereof
Grant 9,531,370 - Chen , et al. December 27, 2
2016-12-27
Transmitter, Common Mode Transceiver Using The Same, And Operating Method Thereof
App 20160373105 - Chen; Chih-Hao ;   et al.
2016-12-22
Semiconductor Device
App 20160284692 - Hung; Kei-Kang ;   et al.
2016-09-29
Transient Voltage Suppressor And Esd Protection Device And Array Thereof
App 20160181236 - Hung; Kei-Kang ;   et al.
2016-06-23
Dual triggered silicon controlled rectifier
Grant 8,183,638 - Hung May 22, 2
2012-05-22
Dual triggered silicon controlled rectifier
Grant 8,089,127 - Hung January 3, 2
2012-01-03
Dual Triggered Silicon Controlled Rectifier
App 20100244094 - Hung; Kei-Kang
2010-09-30
Dual Triggered Silicon Controlled Rectifier
App 20100244095 - Hung; Kei-Kang
2010-09-30
Dual triggered silicon controlled rectifier
Grant 7,777,277 - Hung August 17, 2
2010-08-17
Level shifter circuit
Grant 7,710,151 - Hung , et al. May 4, 2
2010-05-04
Level Shifter Circuit
App 20090230991 - HUNG; Kei-Kang ;   et al.
2009-09-17
Dual Triggered Silicon Controlled Rectifier
App 20090189183 - Hung; Kei-Kang
2009-07-30
Electrostatic discharge protection circuit of non-gated diode and fabrication method thereof
Grant 7,141,484 - Ker , et al. November 28, 2
2006-11-28
Electrostatic discharge protection circuit of non-gated diode and fabrication method thereof
Grant 6,933,573 - Ker , et al. August 23, 2
2005-08-23
Silicon-on-insulator diodes and ESD protection circuits
Grant 6,894,324 - Ker , et al. May 17, 2
2005-05-17
Silicon-on-insulator diodes and ESD protection circuits
Grant 6,861,680 - Ker , et al. March 1, 2
2005-03-01
Semiconductor device with ESD protection
App 20040155292 - Hung, Kei-Kang ;   et al.
2004-08-12
Semiconductor device with ESD protection
App 20040155294 - Hung, Kei-Kang ;   et al.
2004-08-12
Semiconductor device with ESD protection
App 20040155293 - Hung, Kei-Kang ;   et al.
2004-08-12
Low-voltage-triggered SOI-SCR device and associated ESD protection circuit
Grant 6,768,619 - Ker , et al. July 27, 2
2004-07-27
SCR devices in silicon-on-insulator CMOS process for on-chip ESD protection
Grant 6,750,515 - Ker , et al. June 15, 2
2004-06-15
Dual-triggered electrostatic discharge protection circuit
Grant 6,747,501 - Ker , et al. June 8, 2
2004-06-08
Electrostatic discharge protection circuit of non-gated diode and fabrication method thereof
App 20040105203 - Ker, Ming-Dou ;   et al.
2004-06-03
Power-rail electrostatic discharge protection circuit with a dual trigger design
Grant 6,728,086 - Hung , et al. April 27, 2
2004-04-27
CMOS whole chip low capacitance ESD protection circuit
Grant 6,690,557 - Hung , et al. February 10, 2
2004-02-10
Effective gate-driven or gate-coupled ESD protection circuit
Grant 6,690,561 - Hung , et al. February 10, 2
2004-02-10
Double-triggered electrostatic discharge protection circuit
Grant 6,671,147 - Ker , et al. December 30, 2
2003-12-30
Silicon-on-insulator diodes and ESD protection circuits
Grant 6,653,670 - Ker , et al. November 25, 2
2003-11-25
Silicon-on-insulator diodes and ESD protection circuits
Grant 6,649,944 - Ker , et al. November 18, 2
2003-11-18
Semiconductor device with ESD protection
App 20030202307 - Hung, Kei-Kang ;   et al.
2003-10-30
Electrostatic discharge protection circuit for protecting input and output buffer
Grant 6,639,772 - Chuang , et al. October 28, 2
2003-10-28
Semiconductor device with substrate-triggered ESD protection
Grant 6,639,283 - Hung , et al. October 28, 2
2003-10-28
Semiconductor Device With Substrate-triggered Esd Protection
App 20030189230 - Hung, Kei-Kang ;   et al.
2003-10-09
SCR devices in silicon-on-insulator CMOS process for on-chip ESD protection
App 20030146474 - Ker, Ming-Dou ;   et al.
2003-08-07
Electrostatic discharge protection circuit of non-gated diode and fabrication method thereof
App 20030139024 - Ker, Ming-Dou ;   et al.
2003-07-24
Power-rail electrostatic discharge protection circuit with a dual trigger design
App 20030133237 - Hung, Kei-Kang ;   et al.
2003-07-17
Electrostatic discharge protection circuit for protecting input and output buffer
App 20030128486 - Chuang, Chien-Hui ;   et al.
2003-07-10
Low-voltage-triggered SOI-SCR device and associated ESD protection circuit
App 20030122192 - Ker, Ming-Dou ;   et al.
2003-07-03
Low-voltage-triggered SOI-SCR device and associated ESD protection circuit
Grant 6,573,566 - Ker , et al. June 3, 2
2003-06-03
Silicon-on-insulator diodes and ESD protection circuits
App 20030080350 - Ker, Ming-Dou ;   et al.
2003-05-01
Silicon-on-insulator diodes and ESD protection circuits
App 20030080386 - Ker, Ming-Dou ;   et al.
2003-05-01
Silicon-on-insulator diodes and ESD protection circuits
App 20030062540 - Ker, Ming-Dou ;   et al.
2003-04-03
CMOS whole chip low capacitance ESD protection circuit
App 20030058592 - Hung, Kei-Kang ;   et al.
2003-03-27
Effective gate-driven or gate-coupled ESD protection circuit
App 20030043523 - Hung, Kei-Kang ;   et al.
2003-03-06
Method of forming a silicon controlled rectifier devices in SOI CMOS process for on-chip ESD protection
Grant 6,521,952 - Ker , et al. February 18, 2
2003-02-18
Dual-triggered electrostatic discharge protection circuit
App 20030011949 - Ker, Ming-Dou ;   et al.
2003-01-16
Low-voltage-triggered SOI-SCR device and associated ESD protection circuit
App 20030007301 - Ker, Ming-Dou ;   et al.
2003-01-09
Double-triggered electrostatic discharge protection circuit
App 20020154462 - Ker, Ming-Dou ;   et al.
2002-10-24
Silicon-on-insulator diodes and ESD protection circuits
App 20020109153 - Ker, Ming-Dou ;   et al.
2002-08-15

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed