Hung; Jui-Pin

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hung; Jui-Pin.The latest application filed is for "integrated circuit structure".

Company Profile

41.151.155

Hung; Jui-Pin - Hsinchu TW
Hung; Jui-Pin - Hsin-Chu TW
Hung; Jui-Pin - Taipei TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Integrated Circuit Structure App 20220217847 - Yu; Chen-Hua ; et al.	2022-07-07
Semiconductor package Grant 11,362,046 - Lin , et al. June 14, 2	2022-06-14
Integrated Passive Device Package And Methods Of Forming Same App 20220165587 - Hsu; Feng-Cheng ; et al.	2022-05-26
Multi-chip package and method of formation Grant 11,335,658 - Lin , et al. May 17, 2	2022-05-17
Structure and formation method for chip package Grant 11,329,031 - Hung , et al. May 10, 2	2022-05-10
Integrated circuit structure Grant 11,291,116 - Yu , et al. March 29, 2	2022-03-29
Integrated passive device package and methods of forming same Grant 11,251,054 - Hsu , et al. February 15, 2	2022-02-15
Molding wafer chamber Grant 11,205,579 - Lin , et al. December 21, 2	2021-12-21
Integrated Circuit Structure and Method for Reducing Polymer Layer Delamination App 20210351173 - Lin; Jing-Cheng ; et al.	2021-11-11
Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices Grant 11,158,587 - Tsai , et al. October 26, 2	2021-10-26
Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices Grant 11,158,588 - Tsai , et al. October 26, 2	2021-10-26
Semiconductor Structure App 20210280528 - YU; CHEN-HUA ; et al.	2021-09-09
Integrated circuit structure and method for reducing polymer layer delamination Grant 11,081,475 - Lin , et al. August 3, 2	2021-08-03
Three-layer package-on-package structure and method forming same Grant 11,069,656 - Hung , et al. July 20, 2	2021-07-20
Chip on Package Structure and Method App 20210217726 - Yu; Chen-Hua ; et al.	2021-07-15
Semiconductor package Grant 11,063,023 - Hsu , et al. July 13, 2	2021-07-13
Interconnect structure for package-on-package devices Grant 11,037,861 - Hung , et al. June 15, 2	2021-06-15
Semiconductor structure Grant 11,018,095 - Yu , et al. May 25, 2	2021-05-25
Semiconductor structure and manufacturing method thereof Grant 10,971,483 - Jeng , et al. April 6, 2	2021-04-06
Methods of packaging semiconductor devices including placing semiconductor devices into die caves Grant 10,964,594 - Lin , et al. March 30, 2	2021-03-30
Chip on package structure and method Grant 10,964,666 - Yu , et al. March 30, 2	2021-03-30
Structure and Formation Method for Chip Package App 20200381407 - Hung; Jui-Pin ; et al.	2020-12-03
Semiconductor Package App 20200373278 - HSU; FENG-CHENG ; et al.	2020-11-26
Multi-chip fan out package and methods of forming the same Grant 10,833,039 - Yu , et al. November 10, 2	2020-11-10
Integrated Fan-Out Package Structures with Recesses in Molding Compound App 20200350279 - Tsai; Po-Hao ; et al.	2020-11-05
Packaged Semiconductor Devices, Methods of Packaging Semiconductor Devices, and PoP Devices App 20200312791 - Tsai; Po-Hao ; et al.	2020-10-01
Semiconductor Package App 20200294936 - Lin; Jing-Cheng ; et al.	2020-09-17
Semiconductor package and manufacturing method of the same Grant 10,770,437 - Hung , et al. Sep	2020-09-08
Manufacturing method of semiconductor package Grant 10,756,064 - Hsu , et al. A	2020-08-25
Structure and formation method for chip package Grant 10,748,882 - Hung , et al. A	2020-08-18
Method For Manufacturing Semiconductor Package Structure App 20200258849 - A1	2020-08-13
Semiconductor Structure App 20200243460 - YU; CHEN-HUA ; et al.	2020-07-30
Integrated fan-out package structures with recesses in molding compound Grant 10,720,403 - Tsai , et al.	2020-07-21
Semiconductor package Grant 10,672,723 - Lin , et al.	2020-06-02
Packaged Semiconductor Devices, Methods of Packaging Semiconductor Devices, and PoP Devices App 20200144202 - Tsai; Po-Hao ; et al.	2020-05-07
Three-Layer Package-on-Package Structure and Method Forming Same App 20200135694 - Hung; Jui-Pin ; et al.	2020-04-30
Semiconductor package structure Grant 10,636,747 - Hung , et al.	2020-04-28
Semiconductor structure and manufacturing method thereof Grant 10,629,541 - Yu , et al.	2020-04-21
Manufacturing method of semiconductor package Grant 10,622,336 - Hsu , et al.	2020-04-14
Integrated Passive Device Package And Methods Of Forming Same App 20200090955 - Hsu; Feng-Cheng ; et al.	2020-03-19
Interconnect Structure for Package-on-Package Devices App 20200083145 - Hung; Jui-Pin ; et al.	2020-03-12
Manufacturing Method Of Semiconductor Package App 20200043900 - HSU; FENG-CHENG ; et al.	2020-02-06
Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices Grant 10,529,673 - Tsai , et al. J	2020-01-07
Semiconductor package device Grant 10,522,439 - Liu , et al. Dec	2019-12-31
Interconnect structure for package-on-package devices Grant 10,515,875 - Hung , et al. Dec	2019-12-24
Three-layer package-on-package structure and method forming same Grant 10,515,930 - Hung , et al. Dec	2019-12-24
Chip on package structure and method Grant 10,510,717 - Yu , et al. Dec	2019-12-17
Integrated passive device package and methods of forming same Grant 10,504,752 - Hsu , et al. Dec	2019-12-10
Method of manufacturing a semiconductor device including through silicon plugs Grant 10,497,619 - Yu , et al. De	2019-12-03
Integrated Circuit Structure and Method of Forming App 20190350082 - Yu; Chen-Hua ; et al.	2019-11-14
Semiconductor package and manufacturing method of the same Grant 10,475,769 - Hsu , et al. Nov	2019-11-12
Semiconductor Package App 20190252329 - Lin; Jing-Cheng ; et al.	2019-08-15
Interconnect Structure for Package-on-Package Devices and a Method of Fabricating App 20190252296 - Hung; Jui-Pin ; et al.	2019-08-15
Integrated circuit structure and method of forming Grant 10,368,442 - Yu , et al. July 30, 2	2019-07-30
Integrated fan-out structure with guiding trenches in buffer layer Grant 10,354,982 - Tsai , et al. July 16, 2	2019-07-16
Semiconductor Structure And Manufacturing Method Thereof App 20190148347 - JENG; SHIN-PUU ; et al.	2019-05-16
Multi-Chip Package and Method of Formation App 20190139922 - Lin; Jing-Cheng ; et al.	2019-05-09
Semiconductor package Grant 10,276,516 - Lin , et al.	2019-04-30
Methods Of Packaging Semiconductor Devices And Structures Thereof App 20190122929 - Lin; Jing-Cheng ; et al.	2019-04-25
Interconnect structure for package-on-package devices Grant 10,269,685 - Hung , et al.	2019-04-23
Package on package (PoP) bonding structures Grant 10,269,778 - Lin , et al.	2019-04-23
Multi-Chip Fan Out Package and Methods of Forming the Same App 20190109118 - Yu; Chen-Hua ; et al.	2019-04-11
Manufacturing Method Of Semiconductor Package App 20190103382 - HSU; FENG-CHENG ; et al.	2019-04-04
Structure and Formation Method for Chip Package App 20190006332 - Hung; Jui-Pin ; et al.	2019-01-03
Chip on Package Structure and Method App 20180374822 - Yu; Chen-Hua ; et al.	2018-12-27
Semiconductor structure and manufacturing method thereof Grant 10,163,876 - Jeng , et al. Dec	2018-12-25
Semiconductor package structure Grant 10,163,860 - Hsu , et al. Dec	2018-12-25
Methods of packaging semiconductor devices including placing semiconductor devices into die caves Grant 10,163,711 - Lin , et al. Dec	2018-12-25
Multi-chip package and method of formation Grant 10,163,841 - Lin , et al. Dec	2018-12-25
Multi-chip fan out package and methods of forming the same Grant 10,163,857 - Yu , et al. Dec	2018-12-25
Package with metal-insulator-metal capacitor and method of manufacturing the same Grant 10,153,205 - Yu , et al. Dec	2018-12-11
Semiconductor Package And Manufacturing Method Of The Same App 20180350786 - HUNG; JUI-PIN ; et al.	2018-12-06
Integrated Fan-Out Package Structures with Recesses in Molding Compound App 20180350770 - Tsai; Po-Hao ; et al.	2018-12-06
Method Of Manufacturing A Semiconductor Device Including Through Silicon Plugs App 20180350678 - YU; Chen-Hua ; et al.	2018-12-06
Packaged Semiconductor Devices, Methods of Packaging Semiconductor Devices, and PoP Devices App 20180350756 - Tsai; Po-Hao ; et al.	2018-12-06
Semiconductor Structure And Manufacturing Method Thereof App 20180331048 - YU; CHEN-HUA ; et al.	2018-11-15
Packaging methods and packaged semiconductor devices Grant 10,128,175 - Lin , et al. November 13, 2	2018-11-13
Semiconductor Package Structure App 20180294237 - HUNG; JUI-PIN ; et al.	2018-10-11
Integrated Fan-Out Structure with Guiding Trenches in Buffer Layer App 20180286839 - Tsai; Po-Hao ; et al.	2018-10-04
Integrated fan-out structure with guiding trenches in buffer layer Grant 10,083,946 - Tsai , et al. September 25, 2	2018-09-25
Semiconductor Structure And Manufacturing Method Thereof App 20180269189 - JENG; SHIN-PUU ; et al.	2018-09-20
Semiconductor Package Device App 20180269124 - LIU; NAI-WEI ; et al.	2018-09-20
Die package with openings surrounding end-portions of through package vias (TPVs) and package on package (PoP) using the die package Grant 10,079,225 - Lin , et al. September 18, 2	2018-09-18
Die package with openings surrounding end-portions of through package vias (TPVs) and package on package (PoP) using the die package Grant 10,079,159 - Lin , et al. September 18, 2	2018-09-18
Structure and formation method for chip package Grant 10,074,637 - Hung , et al. September 11, 2	2018-09-11
Semiconductor Package App 20180247900 - Lin; Jing-Cheng ; et al.	2018-08-30
Integrated fan-out package structures with recesses in molding compound Grant 10,062,662 - Tsai , et al. August 28, 2	2018-08-28
Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices Grant 10,049,989 - Tsai , et al. August 14, 2	2018-08-14
Method of manufacturing a semiconductor device including through silicon plugs Grant 10,049,931 - Yu , et al. August 14, 2	2018-08-14
Semiconductor package and manufacturing method of the same Grant 10,050,024 - Hung , et al. August 14, 2	2018-08-14
Three-Layer Package-on-Package Structure and Method Forming Same App 20180226378 - Hung; Jui-Pin ; et al.	2018-08-09
Interconnect Structure for Package-on-Package Devices and a Method of Fabricating App 20180211901 - Hung; Jui-Pin ; et al.	2018-07-26
Semiconductor structure and manufacturing method thereof Grant 10,032,725 - Yu , et al. July 24, 2	2018-07-24
Integrated Passive Device Package and Methods of Forming Same App 20180197755 - Hsu; Feng-Cheng ; et al.	2018-07-12
Wafer-level packaging mechanisms Grant 10,008,463 - Lin , et al. June 26, 2	2018-06-26
Semiconductor package structure and manufacturing method thereof Grant 9,997,471 - Hung , et al. June 12, 2	2018-06-12
Semiconductor structure and manufacturing method thereof Grant 9,985,006 - Jeng , et al. May 29, 2	2018-05-29
Semiconductor package device and manufacturing method thereof Grant 9,978,657 - Liu , et al. May 22, 2	2018-05-22
End point detection in grinding Grant 9,960,088 - Mao , et al. May 1, 2	2018-05-01
Method of forming a semiconductor package Grant 9,960,125 - Lin , et al. May 1, 2	2018-05-01
Integrated fan-out package structures with recesses in molding compound Grant 9,953,955 - Tsai , et al. April 24, 2	2018-04-24
Molding chamber apparatus and curing method Grant 9,950,450 - Lin , et al. April 24, 2	2018-04-24
Three-layer Package-on-Package structure and method forming same Grant 9,935,080 - Hung , et al. April 3, 2	2018-04-03
Interconnect structure for package-on-package devices and a method of fabricating Grant 9,922,903 - Hung , et al. March 20, 2	2018-03-20
Integrated passive device package and methods of forming same Grant 9,911,629 - Hsu , et al. March 6, 2	2018-03-06
Semiconductor Package Structure And Method For Manufacturing The Same App 20180033770 - HSU; FENG-CHENG ; et al.	2018-02-01
Semiconductor Package Structure And Manufacturing Method Thereof App 20180025992 - HUNG; JUI-PIN ; et al.	2018-01-25
Semiconductor Package And Manufacturing Method Of The Same App 20170373039 - HSU; FENG-CHENG ; et al.	2017-12-28
Semiconductor Package And Manufacturing Method Of The Same App 20170365587 - HUNG; JUI-PIN ; et al.	2017-12-21
Packages, packaging methods, and packaged semiconductor devices Grant 9,847,315 - Lin , et al. December 19, 2	2017-12-19
Semiconductor Structure And Manufacturing Method Thereof App 20170345804 - JENG; SHIN-PUU ; et al.	2017-11-30
Three-Layer Package-on-Package Structure and Method Forming Same App 20170317053 - Hung; Jui-Pin ; et al.	2017-11-02
Chip on Package Structure and Method App 20170309596 - Yu; Chen-Hua ; et al.	2017-10-26
Multi-Chip Fan Out Package and Methods of Forming the Same App 20170294409 - Yu; Chen-Hua ; et al.	2017-10-12
Molding Wafer Chamber App 20170278723 - Lin; Jing-Cheng ; et al.	2017-09-28
Package on Package (PoP) Bonding Structures App 20170271311 - Lin; Jing-Cheng ; et al.	2017-09-21
Methods of Packaging Semiconductor Devices and Structures Thereof App 20170271209 - Lin; Jing-Cheng ; et al.	2017-09-21
Multi-chip package structure and method of forming same Grant 9,748,189 - Hung , et al. August 29, 2	2017-08-29
Integrated Passive Device Package And Methods Of Forming Same App 20170229322 - Hsu; Feng-Cheng ; et al.	2017-08-10
Die package with Openings Surrounding End-portions of Through Package Vias (TPVs) and Package on Package (PoP) Using the Die Package App 20170229432 - Lin; Jing-Cheng ; et al.	2017-08-10
Integrated Fan-Out Structure with Guiding Trenches in Buffer Layer App 20170229433 - Tsai; Po-Hao ; et al.	2017-08-10
Chip on package structure and method Grant 9,704,826 - Yu , et al. July 11, 2	2017-07-11
Structure and Formation Method for Chip Package App 20170186736 - Hung; Jui-Pin ; et al.	2017-06-29
Multi-chip fan out package and methods of forming the same Grant 9,691,706 - Yu , et al. June 27, 2	2017-06-27
Integrated Circuit Structure and Method for Reducing Polymer Layer Delamination App 20170170161 - Lin; Jing-Cheng ; et al.	2017-06-15
Molding wafer chamber Grant 9,679,783 - Lin , et al. June 13, 2	2017-06-13
Package on package (PoP) bonding structures Grant 9,673,181 - Lin , et al. June 6, 2	2017-06-06
Methods of packaging semiconductor devices and structures thereof Grant 9,673,098 - Lin , et al. June 6, 2	2017-06-06
Packaged Semiconductor Devices, Methods of Packaging Semiconductor Devices, and PoP Devices App 20170154858 - Tsai; Po-Hao ; et al.	2017-06-01
Methods for molding integrated circuits Grant 9,662,812 - Chen , et al. May 30, 2	2017-05-30
Integrated fan-out structure with guiding trenches in buffer layer Grant 9,633,895 - Tsai , et al. April 25, 2	2017-04-25
Structure and formation method for chip package Grant 9,595,510 - Hung , et al. March 14, 2	2017-03-14
Integrated circuit structure and method for reducing polymer layer delamination Grant 9,583,424 - Lin , et al. February 28, 2	2017-02-28
Semiconductor packaging structure and manufacturing method thereof Grant 9,576,910 - Yu , et al. February 21, 2	2017-02-21
Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices Grant 9,570,401 - Tsai , et al. February 14, 2	2017-02-14
Integrated Fan-Out Package Structures with Recesses in Molding Compound App 20170040288 - Tsai; Po-Hao ; et al.	2017-02-09
Interconnect Structure for Package-on-Package Devices and a Method of Fabricating App 20170025397 - Hung; Jui-Pin ; et al.	2017-01-26
Interconnect structure for wafer level package Grant 9,553,000 - Yu , et al. January 24, 2	2017-01-24
Semiconductor Package Device And Manufacturing Method Thereof App 20170011981 - LIU; NAI-WEI ; et al.	2017-01-12
Methods of Packaging Semiconductor Devices and Structures Thereof App 20160343615 - Lin; Jing-Cheng ; et al.	2016-11-24
Method Of Forming A Semiconductor Package App 20160336280 - Lin; Jing-Cheng ; et al.	2016-11-17
Integrated Fan-Out Structure with Guiding Trenches in Buffer Layer App 20160329307 - Tsai; Po-Hao ; et al.	2016-11-10
Die package with Openings Surrounding End-portions of Through Package Vias (TPVs) and Package on Package (PoP) Using the Die Package App 20160307778 - Lin; Jing-Cheng ; et al.	2016-10-20
Semiconductor package device and manufacturing method thereof Grant 9,466,581 - Liu , et al. October 11, 2	2016-10-11
Chip on Package Structure and Method App 20160293577 - Yu; Chen-Hua ; et al.	2016-10-06
Integrated Circuit Structure and Method of Forming App 20160295700 - Yu; Chen-Hua ; et al.	2016-10-06
Interconnect structure for package-on-package devices and a method of fabricating Grant 9,460,987 - Hung , et al. October 4, 2	2016-10-04
Package on Package (PoP) Bonding Structures App 20160284677 - Lin; Jing-Cheng ; et al.	2016-09-29
Packaged Semiconductor Devices, Methods of Packaging Semiconductor Devices, and PoP Devices App 20160276278 - Tsai; Po-Hao ; et al.	2016-09-22
Semiconductor Structure And Manufacturing Method Thereof App 20160268214 - YU; CHEN-HUA ; et al.	2016-09-15
Semiconductor Structure And Manufacturing Method Thereof App 20160254229 - YU; CHEN-HUA ; et al.	2016-09-01
Method of forming a semiconductor package Grant 9,431,367 - Lin , et al. August 30, 2	2016-08-30
Integrated fan-out structure with guiding trenches in buffer layer Grant 9,425,121 - Tsai , et al. August 23, 2	2016-08-23
Package with a fan-out structure and method of forming the same Grant 9,406,598 - Mao , et al. August 2, 2	2016-08-02
Methods of packaging semiconductor devices and structures thereof Grant 9,406,581 - Lin , et al. August 2, 2	2016-08-02
Method Of Manufacturing A Semiconductor Device Including Through Silicon Plugs App 20160197014 - YU; Chen-Hua ; et al.	2016-07-07
Method and apparatus for a conductive pillar structure Grant 9,379,080 - Chang , et al. June 28, 2	2016-06-28
Die package with openings surrounding end-portions of through package vias (TPVs) and package on package (PoP) using the die package Grant 9,378,982 - Lin , et al. June 28, 2	2016-06-28
Chip on package structure and method Grant 9,373,527 - Yu , et al. June 21, 2	2016-06-21
Package on package (PoP) bonding structures Grant 9,368,438 - Lin , et al. June 14, 2	2016-06-14
Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices Grant 9,355,973 - Tsai , et al. May 31, 2	2016-05-31
Package for three dimensional integrated circuit Grant 9,337,063 - Chen , et al. May 10, 2	2016-05-10
Package With Metal-insulator-metal Capacitor And Method Of Manufacturing The Same App 20160118301 - Yu; Chen-Hua ; et al.	2016-04-28
Interconnect Structure for Wafer Level Package App 20160118272 - Yu; Chen-Hua ; et al.	2016-04-28
Method of packaging a semiconductor device Grant 9,312,148 - Lin , et al. April 12, 2	2016-04-12
Method for forming chip-on-wafer assembly Grant 9,312,149 - Lin , et al. April 12, 2	2016-04-12
Packaging methods for semiconductor devices Grant 9,299,682 - Hung , et al. March 29, 2	2016-03-29
Method of manufacturing a semiconductor device including through silicon plugs Grant 9,287,440 - Yu , et al. March 15, 2	2016-03-15
Package with metal-insulator-metal capacitor and method of manufacturing the same Grant 9,263,511 - Yu , et al. February 16, 2	2016-02-16
Integrated Fan-Out Package Structures with Recesses in Molding Compound App 20160013150 - Tsai; Po-Hao ; et al.	2016-01-14
Interconnect structure for wafer level package Grant 9,230,902 - Yu , et al. January 5, 2	2016-01-05
Methods of Packaging Semiconductor Devices and Structures Thereof App 20150364395 - Lin; Jing-Cheng ; et al.	2015-12-17
Semiconductor device and manufacturing method thereof Grant 9,159,678 - Cheng , et al. October 13, 2	2015-10-13
Integrated fan-out package structures with recesses in molding compound Grant 9,142,432 - Tsai , et al. September 22, 2	2015-09-22
Interconnect Structure for Package-on-Package Devices App 20150255447 - Hung; Jui-Pin ; et al.	2015-09-10
Methods of packaging semiconductor devices and structures thereof Grant 9,117,682 - Lin , et al. August 25, 2	2015-08-25
Fan out package, semiconductor device and manufacturing method thereof Grant 9,111,914 - Lin , et al. August 18, 2	2015-08-18
Chip on wafer bonder Grant 9,093,447 - Yu , et al. July 28, 2	2015-07-28
Method and Apparatus for a Conductive Pillar Structure App 20150187724 - Chang; Jung-Hua ; et al.	2015-07-02
Method Of Packaging A Semiconductor Device App 20150187605 - LIN; Jing-Cheng ; et al.	2015-07-02
Packaging methods and structures using a die attach film Grant 9,064,879 - Hung , et al. June 23, 2	2015-06-23
Method of fabricating interconnect structure for package-on-package devices Grant 9,048,222 - Hung , et al. June 2, 2	2015-06-02
Novel Semiconductor Package With Through Silicon Vias App 20150147834 - Yu; Chen-Hua ; et al.	2015-05-28
Semiconductor Device And Manufacturing Method Thereof App 20150137351 - CHENG; LI-HUI ; et al.	2015-05-21
Packaging Methods for Semiconductor Devices App 20150132892 - Hung; Jui-Pin ; et al.	2015-05-14
Chip on Package Structure and Method App 20150115464 - Yu; Chen-Hua ; et al.	2015-04-30
Semiconductor Device And Manufacturing Method Thereof App 20150108634 - LIU; NAI-WEI ; et al.	2015-04-23
Semiconductor Device And Manufacturing Method Thereof App 20150102503 - LIN; JING-CHENG ; et al.	2015-04-16
Packaged semiconductor device with a molding compound and a method of forming the same Grant 9,000,584 - Lin , et al. April 7, 2	2015-04-07
Method and apparatus for a conductive pillar structure Grant 8,994,171 - Chang , et al. March 31, 2	2015-03-31
Multi-Chip Package and Method of Formation App 20150084191 - Lin; Jing-Cheng ; et al.	2015-03-26
Multi-Chip Package Structure and Method of Forming Same App 20150084190 - Hung; Jui-Pin ; et al.	2015-03-26
Integrated Fan-Out Package Structures with Recesses in Molding Compound App 20150076713 - Tsai; Po-Hao ; et al.	2015-03-19
Integrated Fan-Out Structure with Guiding Trenches in Buffer Layer App 20150069623 - Tsai; Po-Hao ; et al.	2015-03-12
Packages, Packaging Methods, and Packaged Semiconductor Devices App 20150061149 - Lin; Shih Ting ; et al.	2015-03-05
Underfill curing method using carrier Grant 8,962,392 - Kao , et al. February 24, 2	2015-02-24
Molding Chamber Apparatus and Curing Method App 20150050783 - Lin; Jing-Cheng ; et al.	2015-02-19
Packaged Semiconductor Devices, Methods of Packaging Semiconductor Devices, and PoP Devices App 20150050779 - Tsai; Po-Hao ; et al.	2015-02-19
Semiconductor device and manufacturing method thereof Grant 8,952,544 - Lin , et al. February 10, 2	2015-02-10
Semiconductor package with through silicon vias Grant 8,946,742 - Yu , et al. February 3, 2	2015-02-03
Semiconductor device and manufacturing method thereof Grant 8,941,244 - Tsai , et al. January 27, 2	2015-01-27
Packaging methods for semiconductor devices Grant 8,936,966 - Hung , et al. January 20, 2	2015-01-20
Method Of Forming A Semiconductor Package App 20150017764 - LIN; Jing-Cheng ; et al.	2015-01-15
Semiconductor Device And Manufacturing Method Thereof App 20150008587 - LIN; JING-CHENG ; et al.	2015-01-08
Semiconductor Device And Manufacturing Method Thereof App 20150008586 - TSAI; PO-HAO ; et al.	2015-01-08
Multi-chip package and method of formation Grant 8,927,412 - Lin , et al. January 6, 2	2015-01-06
Multi-chip package structure and method of forming same Grant 8,928,117 - Hung , et al. January 6, 2	2015-01-06
Adhesion between post-passivation interconnect structure and polymer Grant 8,916,972 - Lin , et al. December 23, 2	2014-12-23
Multiple die packaging interposer structure and method Grant 8,916,956 - Yu , et al. December 23, 2	2014-12-23
Integrated Circuit Structure and Method for Reducing Polymer Layer Delamination App 20140346665 - Lin; Jing-Cheng ; et al.	2014-11-27
Interconnect Structure for Wafer Level Package App 20140339696 - Yu; Chen-Hua ; et al.	2014-11-20
Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices Grant 8,877,554 - Tsai , et al. November 4, 2	2014-11-04
Package for Three Dimensional Integrated Circuit App 20140322866 - Chen; Chih-Hao ; et al.	2014-10-30
Three dimensional (3D) fan-out packaging mechanisms Grant 8,872,326 - Lin , et al. October 28, 2	2014-10-28
Package with a Fan-out Structure and Method of Forming the Same App 20140312492 - Mao; Yi-Chao ; et al.	2014-10-23
Method for Forming Chip-on-Wafer Assembly App 20140287553 - Lin; Jing-Cheng ; et al.	2014-09-25
Adhesion between Post-Passivation Interconnect Structure and Polymer App 20140264853 - Lin; Jing-Cheng ; et al.	2014-09-18
Method and Apparatus for a Conductive Pillar Structure App 20140264828 - Chang; Jung-Hua ; et al.	2014-09-18
Packaged Semiconductor Devices, Methods of Packaging Semiconductor Devices, and PoP Devices App 20140264839 - Tsai; Po-Hao ; et al.	2014-09-18
Interconnect Structure for Package-on-Package Devices App 20140252646 - Hung; Jui-Pin ; et al.	2014-09-11
Interconnect structure for wafer level package Grant 8,829,676 - Yu , et al. September 9, 2	2014-09-09
Wafer's ambiance control Grant 8,827,695 - Hsiao , et al. September 9, 2	2014-09-09
Package With Metal-insulator-metal Capacitor And Method Of Manufacturing The Same App 20140225222 - YU; Chen-Hua ; et al.	2014-08-14
Die package with Openings Surrounding End-portions of Through Package Vias (TPVs) and Package on Package (PoP) Using the Die Package App 20140210101 - Lin; Jing-Cheng ; et al.	2014-07-31
Packaging Methods and Packaged Semiconductor Devices App 20140210081 - Lin; Jing-Cheng ; et al.	2014-07-31
Package with a fan-out structure and method of forming the same Grant 8,785,299 - Mao , et al. July 22, 2	2014-07-22
Wafer-level Packaging Mechanisms App 20140197535 - LIN; Jing-Cheng ; et al.	2014-07-17
Packages including active dies and dummy dies and methods for forming the same Grant 8,779,599 - Lin , et al. July 15, 2	2014-07-15
Package for three dimensional integrated circuit Grant 8,772,929 - Chen , et al. July 8, 2	2014-07-08
Package on Package (PoP) Bonding Structures App 20140183731 - Lin; Jing-Cheng ; et al.	2014-07-03
Package With A Fan-out Structure And Method Of Forming The Same App 20140151890 - Mao; Yi-Chao ; et al.	2014-06-05
Multiple die packaging interposer structure and method Grant 8,703,539 - Yu , et al. April 22, 2	2014-04-22
Wafer-level packaging mechanisms Grant 8,703,542 - Lin , et al. April 22, 2	2014-04-22
Multiple Die Packaging Interposer Structure and Method App 20140084459 - Yu; Chen-Hua ; et al.	2014-03-27
Three Dimensional (3d) Fan-out Packaging Mechanisms App 20140061888 - LIN; Jing-Cheng ; et al.	2014-03-06
Methods for de-bonding carriers Grant 8,629,043 - Wang , et al. January 14, 2	2014-01-14
Multiple Die Packaging Interposer Structure and Method App 20140001612 - Yu; Chen-Hua ; et al.	2014-01-02
Wafer-level Packaging Mechanisms App 20130307143 - LIN; Jing-Cheng ; et al.	2013-11-21
Method Of Manufacturing A Semiconductor Device Including Through Silicon Plugs App 20130302979 - YU; Chen-Hua ; et al.	2013-11-14
Underfill Curing Method Using Carrier App 20130244378 - KAO; Chin-Fu ; et al.	2013-09-19
Methods for Molding Integrated Circuits App 20130207306 - Chen; Chih-Hao ; et al.	2013-08-15
Heat dissipation by through silicon plugs Grant 8,507,940 - Yu , et al. August 13, 2	2013-08-13
Packaging Methods for Semiconductor Devices App 20130203215 - Hung; Jui-Pin ; et al.	2013-08-08
Multi-Chip Fan Out Package and Methods of Forming the Same App 20130187270 - Yu; Chen-Hua ; et al.	2013-07-25
Packaged Semiconductor Device And Method Of Packaging The Semiconductor Device App 20130168848 - LIN; Jing-Cheng ; et al.	2013-07-04
Chip On Wafer Bonder App 20130157412 - Yu; Chen-Hua ; et al.	2013-06-20
Package for Three Dimensional Integrated Circuit App 20130119533 - Chen; Chih-Hao ; et al.	2013-05-16
Method for Forming Chip-on-Wafer Assembly App 20130119552 - Lin; Jing-Cheng ; et al.	2013-05-16
Methods for De-Bonding Carriers App 20130122689 - Wang; Chung Yu ; et al.	2013-05-16
End Point Detection in Grinding App 20130115854 - Mao; Yi-Chao ; et al.	2013-05-09
Methods of Packaging Semiconductor Devices and Structures Thereof App 20130087916 - Lin; Jing-Cheng ; et al.	2013-04-11
Molding Chamber Apparatus and Curing Method App 20130087951 - Lin; Jing-Cheng ; et al.	2013-04-11
Method for Three Dimensional Integrated Circuit Fabrication App 20130075892 - Lin; Jing-Cheng ; et al.	2013-03-28
Packaging Methods and Structures Using a Die Attach Film App 20130062760 - Hung; Jui-Pin ; et al.	2013-03-14
Chip on wafer bonder Grant 8,387,674 - Yu , et al. March 5, 2	2013-03-05
Molding Wafer Chamber App 20130037990 - Lin; Jing-Cheng ; et al.	2013-02-14
Interconnect Structure for Wafer Level Package App 20130001776 - Yu; Chen-Hua ; et al.	2013-01-03
Limiting switch control method including an appended-function unit Grant 8,179,748 - Hung May 15, 2	2012-05-15
Apparatus for storing substrates Grant 8,109,407 - Hsiao , et al. February 7, 2	2012-02-07
Heat Dissipation By Through Silicon Plugs App 20110241061 - YU; Chen-Hua ; et al.	2011-10-06
Novel Semiconductor Package With Through Silicon Vias App 20110241040 - YU; Chen-Hua ; et al.	2011-10-06
Flash lamp annealing device Grant 7,981,212 - Tien , et al. July 19, 2	2011-07-19
Substrate carrier, port apparatus and facility interface and apparatus including same Grant 7,758,338 - Hsiao , et al. July 20, 2	2010-07-20
Novel Wafer's Ambiance Control App 20090317214 - Hsiao; Yi-Li ; et al.	2009-12-24
Chip On Wafer Bonder App 20090142903 - Yu; Chen-Hua ; et al.	2009-06-04
Substrate Carrier, Port Apparatus And Facility Interface And Apparatus Including Same App 20080298933 - Hsiao; Yi-Li ; et al.	2008-12-04
Apparatus For Storing Substrates App 20080295412 - Hsiao; Yi-Li ; et al.	2008-12-04
Limit Switch Controlling Method And Apparatus Used In Optical Drive App 20080109833 - Hung; Jui-Pin	2008-05-08
Flash lamp annealing device App 20070235662 - Tien; Fu-Kang ; et al.	2007-10-11

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.