Huemoeller; Ronald Patrick

Patent Applications and Registrations

Patent applications and USPTO patent grants for Huemoeller; Ronald Patrick.The latest application filed is for "semiconductor package with high routing density patch".

Company Profile

17.142.31

Huemoeller; Ronald Patrick - Gilbert AZ
Huemoeller; Ronald Patrick - Chandler AZ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor device package and manufacturing method thereof Grant 11,424,155 - Kelly , et al. August 23, 2	2022-08-23
Semiconductor Package With High Routing Density Patch App 20220223563 - Kelly; Michael ; et al.	2022-07-14
Semiconductor package with high routing density patch Grant 11,289,451 - Kelly , et al. March 29, 2	2022-03-29
Encapsulated Semiconductor Package App 20210358770 - Huemoeller; Ronald Patrick ; et al.	2021-11-18
Semiconductor Device With Tiered Pillar And Manufacturing Method Thereof App 20210296139 - Huemoeller; Ronald Patrick ; et al.	2021-09-23
Encapsulated semiconductor package Grant 11,094,560 - Huemoeller , et al. August 17, 2	2021-08-17
Methods of manufacturing an encapsulated semiconductor device Grant 11,081,370 - Huemoeller , et al. August 3, 2	2021-08-03
Semiconductor device with tiered pillar and manufacturing method thereof Grant 11,031,256 - Huemoeller , et al. June 8, 2	2021-06-08
Semiconductor Package With High Routing Density Patch App 20200411475 - Kelly; Michael ; et al.	2020-12-31
Packaging For Fingerprint Sensors And Methods Of Manufacture App 20200365480 - Huemoeller; Ronald Patrick ; et al.	2020-11-19
Semiconductor Device Package And Manufacturing Method Thereof App 20200343129 - Kelly; Michael G. ; et al.	2020-10-29
Encapsulated semiconductor package Grant 10,811,277 - Huemoeller , et al. October 20, 2	2020-10-20
Semiconductor Device With Tiered Pillar And Manufacturing Method Thereof App 20200294815 - Huemoeller; Ronald Patrick ; et al.	2020-09-17
Semiconductor device with tiered pillar and manufacturing method thereof Grant 10,748,786 - Huemoeller , et al. A	2020-08-18
Semiconductor device package and manufacturing method thereof Grant 10,714,378 - Kelly , et al.	2020-07-14
Semiconductor package with high routing density patch Grant 10,672,740 - Kelly , et al.	2020-06-02
Wafer level package and fabrication method Grant 10,665,567 - Huemoeller , et al.	2020-05-26
Packaging for fingerprint sensors and methods of manufacture Grant 10,636,717 - Huemoeller , et al.	2020-04-28
Packaging for fingerprint sensors and methods of manufacture Grant RE47,890 - Huemoeller , et al.	2020-03-03
Encapsulated Semiconductor Package App 20200066547 - Huemoeller; Ronald Patrick ; et al.	2020-02-27
Encapsulated semiconductor package Grant 10,461,006 - Huemoeller , et al. Oc	2019-10-29
Semiconductor Device Package And Manufacturing Method Thereof App 20190326161 - Kelly; Michael G. ; et al.	2019-10-24
Encapsulated Semiconductor Package App 20190287818 - Huemoeller; Ronald Patrick ; et al.	2019-09-19
Semiconductor Device With Tiered Pillar And Manufacturing Method Thereof App 20190237343 - Huemoeller; Ronald Patrick ; et al.	2019-08-01
Semiconductor device package and manufacturing method thereof Grant 10,283,400 - Kelly , et al.	2019-05-07
Semiconductor device with tiered pillar and manufacturing method thereof Grant 10,256,114 - Huemoeller , et al.	2019-04-09
Semiconductor Package With High Routing Density Patch App 20190043829 - Kelly; Michael ; et al.	2019-02-07
Stress relieving through-silicon vias Grant 10,134,635 - Baloglu , et al. November 20, 2	2018-11-20
Trace stacking structure and method Grant 10,128,194 - Hiner , et al. November 13, 2	2018-11-13
Semiconductor device package and manufacturing method thereof Grant 10,090,234 - Kelly , et al. October 2, 2	2018-10-02
Semiconductor Device With Tiered Pillar And Manufacturing Method Thereof App 20180277394 - Huemoeller; Ronald Patrick ; et al.	2018-09-27
Semiconductor package with high routing density patch Grant 10,074,630 - Kelly , et al. September 11, 2	2018-09-11
Embedded component package and fabrication method Grant 10,014,240 - Huemoeller , et al. July 3, 2	2018-07-03
Semiconductor device package and manufacturing method thereof Grant 9,966,300 - Kelly , et al. May 8, 2	2018-05-08
Packaging For Fingerprint Sensors And Methods Of Manufacture App 20180090409 - Huemoeller; Ronald Patrick ; et al.	2018-03-29
Wafer level package and fabrication method Grant 9,871,015 - Huemoeller , et al. January 16, 2	2018-01-16
Encapsulated semiconductor package Grant 9,812,386 - Huemoeller , et al. November 7, 2	2017-11-07
Semicondutor device with through-silicon via-less deep wells Grant 9,799,592 - Huemoeller , et al. October 24, 2	2017-10-24
Embedded Die In Panel Method And Structure App 20170278810 - Huemoeller; Ronald Patrick ; et al.	2017-09-28
Packaging for fingerprint sensors and methods of manufacture Grant 9,754,852 - Huemoeller , et al. September 5, 2	2017-09-05
Interposer, manufacturing method thereof, semiconductor package using the same, and method for fabricating the semiconductor package Grant 9,704,842 - Lee , et al. July 11, 2	2017-07-11
Semiconductor Device Package and Manufacturing Method Thereof App 20170186679 - Kelly; Michael G. ; et al.	2017-06-29
Buildup dielectric layer having metallization pattern semiconductor package fabrication method Grant 9,691,635 - Huemoeller , et al. June 27, 2	2017-06-27
Stress relieving through-silicon vias Grant 9,607,890 - Baloglu , et al. March 28, 2	2017-03-28
Embedded die in panel method and structure Grant 9,576,917 - Huemoeller , et al. February 21, 2	2017-02-21
Semiconductor device package and manufacturing method thereof Grant 9,553,041 - Kelly , et al. January 24, 2	2017-01-24
Semiconductor Package With High Routing Density Patch App 20160307870 - Kelly; Michael ; et al.	2016-10-20
Extended landing pad substrate package structure and method Grant 9,462,704 - Hiner , et al. October 4, 2	2016-10-04
Wafer level package and fabrication method Grant 9,406,645 - Huemoeller , et al. August 2, 2	2016-08-02
Semiconductor device package and manufacturing method thereof Grant 9,349,681 - Kelly , et al. May 24, 2	2016-05-24
Through via nub reveal method and structure Grant 9,324,614 - Huemoeller , et al. April 26, 2	2016-04-26
Trace stacking structure and method Grant 9,230,883 - Hiner , et al. January 5, 2	2016-01-05
Through via connected backside embedded circuit features structure and method Grant 9,159,672 - Hiner , et al. October 13, 2	2015-10-13
Method and system for a semiconductor for device package with a die-to-packaging substrate first bond Grant 9,136,159 - Kelly , et al. September 15, 2	2015-09-15
Embedded component package and fabrication method Grant 9,129,943 - Huemoeller , et al. September 8, 2	2015-09-08
Through via recessed reveal structure and method Grant 9,082,833 - Hiner , et al. July 14, 2	2015-07-14
Shielded trace structure and fabrication method Grant 9,060,430 - Huemoeller , et al. June 16, 2	2015-06-16
Wafer level package and fabrication method Grant 9,054,117 - Huemoeller , et al. June 9, 2	2015-06-09
Backside warpage control structure and fabrication method Grant 9,048,298 - Huemoeller , et al. June 2, 2	2015-06-02
Method and system for a semiconductor device package with a die to interposer wafer first bond Grant 9,040,349 - Kelly , et al. May 26, 2	2015-05-26
Semicondutor Device With Through-silicon Via-less Deep Wells App 20150137384 - Huemoeller; Ronald Patrick ; et al.	2015-05-21
Interposer, Manufacturing Method Thereof, Semiconductor Package Using The Same, And Method For Fabricating The Semiconductor Package App 20150125993 - Lee; DongHoon ; et al.	2015-05-07
Method and system for backside dielectric patterning for wafer warpage and stress control Grant 8,987,050 - Hiner , et al. March 24, 2	2015-03-24
Wafer level package and fabrication method Grant 8,952,522 - Huemoeller , et al. February 10, 2	2015-02-10
Electronic component package fabrication method and structure Grant 8,941,250 - Darveaux , et al. January 27, 2	2015-01-27
Extended landing pad substrate package structure and method Grant 8,872,329 - Hiner , et al. October 28, 2	2014-10-28
Method for making an integrated circuit substrate having laminated laser-embedded circuit layers Grant 8,826,531 - Hiner , et al. September 9, 2	2014-09-09
Methods for temporary wafer molding for chip-on-wafer assembly Grant 8,802,499 - Kelly , et al. August 12, 2	2014-08-12
Method and system for a semiconductor device package with a die-to-die first bond Grant 8,796,072 - Kelly , et al. August 5, 2	2014-08-05
Method And System For A Semiconductor Device Package With A Die To Interposer Wafer First Bond App 20140134796 - Kelly; Michael G. ; et al.	2014-05-15
Methods For Temporary Wafer Molding For Chip-On-Wafer Assembly App 20140134800 - Kelly; Michael G. ; et al.	2014-05-15
Method And System For A Semiconductor For Device Package With A Die-To-Packaging Substrate First Bond App 20140134804 - Kelly; Michael G. ; et al.	2014-05-15
Method And System For A Semiconductor Device Package With A Die-To-Die First Bond App 20140134803 - Kelly; Michael G. ; et al.	2014-05-15
Wafer level package and fabrication method Grant 8,710,649 - Huemoeller , et al. April 29, 2	2014-04-29
Flip chip bump structure and fabrication method Grant 8,704,369 - Huemoeller , et al. April 22, 2	2014-04-22
Wafer level package and fabrication method Grant 8,691,632 - Huemoeller , et al. April 8, 2	2014-04-08
Electronic component package fabrication method and structure Grant 8,653,674 - Darveaux , et al. February 18, 2	2014-02-18
Routable single layer substrate and semiconductor package including same Grant 8,551,820 - Foster , et al. October 8, 2	2013-10-08
Direct-write wafer level chip scale package Grant 8,501,543 - Berry , et al. August 6, 2	2013-08-06
Wafer level package and fabrication method Grant 8,486,764 - Huemoeller , et al. July 16, 2	2013-07-16
Through via connected backside embedded circuit features structure and method Grant 8,440,554 - Hiner , et al. May 14, 2	2013-05-14
Shielded embedded electronic component substrate fabrication method and structure Grant 8,432,022 - Huemoeller , et al. April 30, 2	2013-04-30
Bumped chip package Grant 8,426,966 - Huemoeller , et al. April 23, 2	2013-04-23
Through via recessed reveal structure and method Grant 8,390,130 - Hiner , et al. March 5, 2	2013-03-05
Flip chip bump structure and fabrication method Grant 8,390,116 - Huemoeller , et al. March 5, 2	2013-03-05
Metal etch stop fabrication method and structure Grant 8,383,950 - Huemoeller , et al. February 26, 2	2013-02-26
Buildup dielectric layer having metallization pattern semiconductor package fabrication method Grant 8,341,835 - Huemoeller , et al. January 1, 2	2013-01-01
Straight conductor blind via capture pad structure and fabrication method Grant 8,323,771 - Huemoeller , et al. December 4, 2	2012-12-04
Circuit-on-foil process for manufacturing a laminated semiconductor package substrate having embedded conductive patterns Grant 8,322,030 - Huemoeller , et al. December 4, 2	2012-12-04
Through via nub reveal method and structure Grant 8,324,511 - Huemoeller , et al. December 4, 2	2012-12-04
Multi-level circuit substrate fabrication method Grant 8,316,536 - Huemoeller , et al. November 27, 2	2012-11-27
Wafer level package and fabrication method Grant 8,298,866 - Huemoeller , et al. October 30, 2	2012-10-30
Bumped chip package fabrication method and structure Grant 8,263,486 - Huemoeller , et al. September 11, 2	2012-09-11
Semiconductor package including a top-surface metal layer for implementing circuit features Grant 8,227,338 - Scanlan , et al. July 24, 2	2012-07-24
Direct-write wafer level chip scale package Grant 8,188,584 - Berry , et al. May 29, 2	2012-05-29
Protruding post substrate package structure and method Grant 8,176,628 - Rusli , et al. May 15, 2	2012-05-15
Wafer level package fabrication method Grant 8,119,455 - Huemoeller , et al. February 21, 2	2012-02-21
Semiconductor package including top-surface terminals for mounting another semiconductor package Grant 8,110,909 - Hiner , et al. February 7, 2	2012-02-07
Semiconductor package including top-surface terminals for mounting another semiconductor package Grant 8,026,587 - Hiner , et al. September 27, 2	2011-09-27
Thin substrate fabrication method and structure Grant 8,017,436 - Huemoeller , et al. September 13, 2	2011-09-13
Semiconductor package including a top-surface metal layer for implementing circuit features Grant 8,018,068 - Scanlan , et al. September 13, 2	2011-09-13
Bumped chip package fabrication method and structure Grant 7,994,045 - Huemoeller , et al. August 9, 2	2011-08-09
Embedded passive component network substrate fabrication method Grant 7,958,626 - Karim , et al. June 14, 2	2011-06-14
Embedded die metal etch stop fabrication method and structure Grant 7,951,697 - Huemoeller , et al. May 31, 2	2011-05-31
Electronic component package comprising fan-out traces Grant 7,932,595 - Huemoeller , et al. April 26, 2	2011-04-26
Flip chip bump structure and fabrication method Grant 7,932,170 - Huemoeller , et al. April 26, 2	2011-04-26
Metal etch stop fabrication method and structure Grant 7,923,645 - Huemoeller , et al. April 12, 2	2011-04-12
Method and structure for creating embedded metal features Grant 7,911,037 - Huemoeller , et al. March 22, 2	2011-03-22
Ultra thin package and fabrication method Grant 7,842,541 - Rusli , et al. November 30, 2	2010-11-30
Shielded trace structure and fabrication method Grant 7,832,097 - Huemoeller , et al. November 16, 2	2010-11-16
Method of fabricating an embedded circuit pattern Grant 7,752,752 - Rusli , et al. July 13, 2	2010-07-13
Direct-write wafer level chip scale package Grant 7,723,210 - Berry , et al. May 25, 2	2010-05-25
Electronic component package comprising fan-out and fan-in traces Grant 7,714,431 - Huemoeller , et al. May 11, 2	2010-05-11
Two-sided fan-out wafer escape package Grant 7,692,286 - Huemoeller , et al. April 6, 2	2010-04-06
Semiconductor package including top-surface terminals for mounting another semiconductor package Grant 7,671,457 - Hiner , et al. March 2, 2	2010-03-02
Substrate having stiffener fabrication method Grant 7,670,962 - Huemoeller , et al. March 2, 2	2010-03-02
Wafer level package utilizing laser-activated dielectric material Grant 7,632,753 - Rusli , et al. December 15, 2	2009-12-15
Semiconductor package including a top-surface metal layer for implementing circuit features Grant 7,633,765 - Scanlan , et al. December 15, 2	2009-12-15
Embedded metal features structure Grant 7,589,398 - Huemoeller , et al. September 15, 2	2009-09-15
Embedded electronic component package Grant 7,572,681 - Huemoeller , et al. August 11, 2	2009-08-11
Buildup dielectric and metallization process and semiconductor package Grant 7,548,430 - Huemoeller , et al. June 16, 2	2009-06-16
Semiconductor package substrate fabrication method Grant 7,501,338 - Huemoeller , et al. March 10, 2	2009-03-10
Two-sided wafer escape package Grant 7,420,272 - Huemoeller , et al. September 2, 2	2008-09-02
Method for making an integrated circuit substrate having embedded back-side access conductors and vias Grant 7,399,661 - Hiner , et al. July 15, 2	2008-07-15
Semiconductor package and substrate having multi-level vias fabrication method Grant 7,365,006 - Huemoeller , et al. April 29, 2	2008-04-29
Stacked embedded leadframe Grant 7,361,533 - Huemoeller , et al. April 22, 2	2008-04-22
Method for making an integrated circuit substrate having embedded passive components Grant 7,334,326 - Huemoeller , et al. February 26, 2	2008-02-26
Semiconductor package having laser-embedded terminals App 20080043447 - Huemoeller; Ronald Patrick ; et al.	2008-02-21
Substrate having stiffener fabrication method App 20080020132 - Huemoeller; Ronald Patrick ; et al.	2008-01-24
Method for making an integrated circuit substrate having laser-embedded conductive patterns Grant 7,312,103 - Huemoeller , et al. December 25, 2	2007-12-25
Circuit-on-foil process for manufacturing a laminated semiconductor package substrate having embedded conductive patterns Grant 7,297,562 - Huemoeller , et al. November 20, 2	2007-11-20
Two-sided wafer escape package App 20070241446 - Berry; Christopher John ; et al.	2007-10-18
Two-sided wafer escape package Grant 7,247,523 - Huemoeller , et al. July 24, 2	2007-07-24
Wafer level package and fabrication method Grant 7,192,807 - Huemoeller , et al. March 20, 2	2007-03-20
Embedded leadframe semiconductor package Grant 7,190,062 - Sheridan , et al. March 13, 2	2007-03-13
Method of manufacturing a semiconductor package Grant 7,185,426 - Hiner , et al. March 6, 2	2007-03-06
Semiconductor package and substrate having multi-level vias Grant 7,145,238 - Huemoeller , et al. December 5, 2	2006-12-05
Integrated circuit substrate having laser-exposed terminals Grant 7,028,400 - Hiner , et al. April 18, 2	2006-04-18
Integrated circuit substrate having embedded passive components and methods therefor Grant 6,987,661 - Huemoeller , et al. January 17, 2	2006-01-17
Imprinted integrated circuit substrate and method for imprinting an integrated circuit substrate Grant 6,967,124 - Huemoeller , et al. November 22, 2	2005-11-22
Integrated circuit substrate having laminated laser-embedded circuit layers Grant 6,930,257 - Hiner , et al. August 16, 2	2005-08-16
Integrated circuit substrate having laser-embedded conductive patterns and method therefor Grant 6,930,256 - Huemoeller , et al. August 16, 2	2005-08-16
Wafer level package and fabrication method Grant 6,905,914 - Huemoeller , et al. June 14, 2	2005-06-14
Integrated circuit substrate having embedded back-side access conductors and vias App 20050041398 - Huemoeller, Ronald Patrick ; et al.	2005-02-24
Integrated circuit substrate having embedded wire conductors and method therefor Grant 6,831,371 - Huemoeller , et al. December 14, 2	2004-12-14
Solderable injection-molded integrated circuit substrate and method therefor Grant 6,784,376 - Huemoeller , et al. August 31, 2	2004-08-31
Integrated circuit having multiple power/ground connections to a single external terminal Grant 6,747,352 - Huemoeller , et al. June 8, 2	2004-06-08
Semiconductor package having substrate with laser-formed aperture through solder mask layer Grant 6,534,391 - Huemoeller , et al. March 18, 2	2003-03-18