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name:-0.019743204116821
name:-0.017421007156372
name:-0.0035030841827393
Huang; Yi-Chieh Patent Filings

Huang; Yi-Chieh

Patent Applications and Registrations

Patent applications and USPTO patent grants for Huang; Yi-Chieh.The latest application filed is for "memory device, image processing chip, and memory control method".

Company Profile
3.15.21
  • Huang; Yi-Chieh - Hsinchu County TW
  • Huang; Yi-Chieh - Hsin-Chu TW
  • Huang; Yi-Chieh - Nantou County TW
  • Huang; Yi-Chieh - Taichung TW
  • Huang; Yi-Chieh - Taichung City TW
  • Huang; Yi-Chieh - Taipei City TW
  • Huang; Yi-Chieh - Kaohsiung TW
  • HUANG; Yi-Chieh - Kaohsiung City TW
  • HUANG; Yi-Chieh - Kachsiung City TW
  • Huang; Yi-Chieh - Taipei TW
  • Huang; Yi-Chieh - Hsinchu TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Memory Device, Image Processing Chip, And Memory Control Method
App 20220222014 - SUN; SHAN-CHENG ;   et al.
2022-07-14
Filter with direct current level shift and associated phase-locked loop circuit
Grant 11,025,256 - Huang , et al. June 1, 2
2021-06-01
Filter With Direct Current Level Shift And Associated Phase-locked Loop Circuit
App 20200067515 - Huang; Yi-Chieh ;   et al.
2020-02-27
Separable buoy
Grant 10,370,066 - Chiang , et al.
2019-08-06
Separable Buoy
App 20180148136 - CHIANG; Shih-Ying ;   et al.
2018-05-31
Clock generator using resistive components to generate sub-gate delays and/or using common-mode voltage based frequency-locked loop circuit for frequency offset reduction
Grant 9,654,116 - Huang May 16, 2
2017-05-16
Clock Generator Using Resistive Components To Generate Sub-gate Delays And/or Using Common-mode Voltage Based Frequency-locked Loop Circuit For Frequency Offset Reduction
App 20170117904 - Huang; Yi-Chieh
2017-04-27
Clock generator and integrated circuit using the same and injection-locked phase-locked loop control method
Grant 9,634,677 - Huang April 25, 2
2017-04-25
Method for performing phase shift control for timing recovery in an electronic device, and associated apparatus
Grant 9,608,798 - Luo , et al. March 28, 2
2017-03-28
Modulator, phase locked loop using the same, and method applied thereto
Grant 9,584,143 - Huang , et al. February 28, 2
2017-02-28
Clock Generator And Integrated Circuit Using The Same And Injection-locked Phase-locked Loop Control Method
App 20170026048 - HUANG; Yi-Chieh
2017-01-26
Method For Performing Phase Shift Control For Timing Recovery In An Electronic Device, And Associated Apparatus
App 20160308665 - Luo; Yan-Bin ;   et al.
2016-10-20
Modulator, Phase Locked Loop Using The Same, And Method Applied Thereto
App 20160211967 - Huang; Yi-Chieh ;   et al.
2016-07-21
Supply voltage drift insensitive digitally controlled oscillator and phase locked loop circuit
Grant 9,306,577 - Huang , et al. April 5, 2
2016-04-05
Supply Voltage Drift Insensitive Digitally Controlled Oscillator And Phase Locked Loop Circuit
App 20140240053 - HUANG; Yi-Chieh ;   et al.
2014-08-28
Electronic Device
App 20130322026 - Huang; Yi-Chieh ;   et al.
2013-12-05
Seal device and method for assembling a guide block in a gland of the seal device
Grant 8,196,802 - Huang June 12, 2
2012-06-12
Cartridge seal device
Grant 8,186,687 - Huang May 29, 2
2012-05-29
Cartridge Seal Device
App 20110156358 - HUANG; Yi-Chieh
2011-06-30
Seal Device
App 20110156360 - Huang; Cheng-Hsiu ;   et al.
2011-06-30
Seal Device
App 20100308543 - HUANG; Yi-Chieh
2010-12-09
Seal Device And Method For Assembling A Guide Block In A Gland Of The Seal Device
App 20100264602 - HUANG; Yi-Chieh
2010-10-21
Separable glands for cartridge seal
App 20100225066 - Huang; Yi-Chieh
2010-09-09
Image processing device and method
Grant 7,429,963 - Chia , et al. September 30, 2
2008-09-30
Clock signal synthesizer with multiple frequency outputs and method for synthesizing clock signal
Grant 7,102,690 - Lee , et al. September 5, 2
2006-09-05
Method and device for processing image data from non-interlacing type into interlacing one
Grant 7,084,925 - Lee , et al. August 1, 2
2006-08-01
Adaptive deflicker method and adaptive deflicker filter
Grant 7,061,537 - Lee , et al. June 13, 2
2006-06-13
Apparatus and method for generating clock signal
Grant 7,002,634 - Tai , et al. February 21, 2
2006-02-21
Image processing device and method
App 20050264553 - Chia, Pingo ;   et al.
2005-12-01
Device for transforming computer graphics signals to television video signals
Grant 6,842,195 - Huang , et al. January 11, 2
2005-01-11
Clock signal synthesizer with multiple frequency outputs and method for synthesizing clock signal
App 20030174245 - Lee, Chuan-Chen ;   et al.
2003-09-18
Method and device for processing image data from non-interlacing type into interlacing one
App 20030174246 - Lee, Chuan-Chen ;   et al.
2003-09-18
Adaptive deflicker method and adaptive deflicker filter
App 20030174247 - Lee, Chuan-Chen ;   et al.
2003-09-18
Apparatus and method for generating clock signal
App 20030112371 - Tai, Chia-Liang ;   et al.
2003-06-19
Device for transforming computer graphics signals to television video signals
App 20020039147 - Huang, Yi-Chieh ;   et al.
2002-04-04

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