Huang; Xuhao

Patent Applications and Registrations

Patent applications and USPTO patent grants for Huang; Xuhao.The latest application filed is for "method of generating precise and pvt-stable time delay or frequency using cmos circuits".

Company Profile

2.17.11

Huang; Xuhao - San Diego CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of generating precise and PVT-stable time delay or frequency using CMOS circuits Grant 11,196,410 - Wu , et al. December 7, 2	2021-12-07
Method Of Generating Precise And Pvt-stable Time Delay Or Frequency Using Cmos Circuits App 20210194474 - WU; Zhengzheng ; et al.	2021-06-24
Method of generating precise and PVT-stable time delay or frequency using CMOS circuits Grant 10,812,056 - Wu , et al. October 20, 2	2020-10-20
Process-invariant resistor and capacitor pair Grant 10,553,531 - Song , et al. Fe	2020-02-04
Process-invariant Resistor And Capacitor Pair App 20190089030 - Song; Chao ; et al.	2019-03-21
Low-power temperature-insensitive current bias circuit Grant 10,185,337 - Ock , et al. Ja	2019-01-22
Voltage Droop Mitigation Circuit For Power Supply Network App 20180188754 - OCK; Sungmin ; et al.	2018-07-05
Voltage droop mitigation circuit for power supply network Grant 10,013,010 - Ock , et al. July 3, 2	2018-07-03
Hybrid pulse-width control circuit with process and offset calibration Grant 10,003,328 - Yin , et al. June 19, 2	2018-06-19
Low-power low-duty-cycle switched-capacitor voltage divider Grant 9,973,081 - Yin , et al. May 15, 2	2018-05-15
Systems and methods for sharing a serial communication port between a plurality of communication channels Grant 9,602,433 - Huang , et al. March 21, 2	2017-03-21
Distributed clock synchronization Grant 9,478,268 - Clovis , et al. October 25, 2	2016-10-25
Low latency synchronization scheme for mesochronous DDR system Grant 9,437,278 - Jose , et al. September 6, 2	2016-09-06
Distributed Clock Synchronization App 20150364170 - Clovis; Philip Michael ; et al.	2015-12-17
Low Latency Synchronization Scheme For Mesochronous Ddr System App 20150340078 - Jose; Edwin ; et al.	2015-11-26
Clock synchronization Grant 9,191,193 - Huang , et al. November 17, 2	2015-11-17
Low latency synchronization scheme for mesochronous DDR system Grant 9,123,408 - Jose , et al. September 1, 2	2015-09-01
Low Latency Synchronization Scheme For Mesochronous Ddr System App 20140347941 - Jose; Edwin ; et al.	2014-11-27
Digitally Assisted Regulation For An Integrated Capless Low-dropout (ldo) Voltage Regulator App 20140266103 - Wang; Yuhe ; et al.	2014-09-18
High voltage tolerant differential receiver Grant 8,680,891 - Srivastava , et al. March 25, 2	2014-03-25
Systems And Methods For Sharing A Serial Communication Port Between A Plurality Of Communication Channels App 20140029611 - Huang; Xuhao ; et al.	2014-01-30
High voltage tolerant receiver Grant 8,446,204 - Srivastava , et al. May 21, 2	2013-05-21
High Voltage Tolerant Receiver App 20120194254 - Srivastava; Ankit ; et al.	2012-08-02
High Voltage Tolerant Differential Receiver App 20120194253 - Srivastava; Ankit ; et al.	2012-08-02
Delay-locked loop having a delay independent of input signal duty cycle variation Grant 8,076,963 - Huang , et al. December 13, 2	2011-12-13
Delay-locked Loop Having A Delay Independent Of Input Signal Duty Cycle Variation App 20110063005 - Huang; Xuhao ; et al.	2011-03-17

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