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name:-0.03355598449707
name:-0.037768840789795
name:-0.001884937286377
HUANG; Huan-Tsung Patent Filings

HUANG; Huan-Tsung

Patent Applications and Registrations

Patent applications and USPTO patent grants for HUANG; Huan-Tsung.The latest application filed is for "epi block structure in semiconductor product providing high breakdown voltage".

Company Profile
1.20.20
  • HUANG; Huan-Tsung - Changhua City TW
  • Huang; Huan-Tsung - Changhua TW
  • Huang; Huan Tsung - Santa Clara CA
  • Huang; Huan-Tsung - Hsinchu TW
  • Huang; Huan-Tsung - Hsin-Chu TW
  • Huang; Huan-Tsung - Hsinchu County TW
  • Huang; Huan-Tsung - Hsinchi County TW
  • Huang; Huan-Tsung - Jhubei City TW
  • Huang; Huan-Tsung - Hsincu County TW
  • Huang; Huan-Tsung - Jhubei TW
  • Huang; Huan-Tsung - Puli Township Nantou County TW
  • Huang, Huan-Tsung - Hsinchu City TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Epi Block Structure In Semiconductor Product Providing High Breakdown Voltage
App 20210257487 - HU; Chia-Hsin ;   et al.
2021-08-19
Epi block structure in semiconductor product providing high breakdown voltage
Grant 10,998,443 - Hu , et al. May 4, 2
2021-05-04
Direct memory characterization using periphery transistors
Grant 10,679,723 - Lee , et al.
2020-06-09
Fin-type resistor
Grant 9,812,444 - Hu , et al. November 7, 2
2017-11-07
Epi Block Structure In Semiconductor Product Providing High Breakdown Voltage
App 20170301785 - HU; Chia-Hsin ;   et al.
2017-10-19
Fin-type Resistor
App 20170263602 - HU; Chia-Hsin ;   et al.
2017-09-14
Fin-type resistor
Grant 9,691,758 - Hu , et al. June 27, 2
2017-06-27
Semiconductor structure with dielectric-sealed doped region
Grant 9,443,925 - Huang , et al. September 13, 2
2016-09-13
Semiconductor Structure with Dielectric-Sealed Doped Region
App 20160005807 - Huang; Huan-Tsung ;   et al.
2016-01-07
Semiconductor structure with dielectric-sealed doped region
Grant 9,136,329 - Huang , et al. September 15, 2
2015-09-15
Semiconductor Structure with Dielectric-Sealed Doped Region
App 20140252426 - Huang; Huan-Tsung ;   et al.
2014-09-11
Semiconductor device with metal gate
Grant 8,754,487 - Masuoka , et al. June 17, 2
2014-06-17
Local charge and work function engineering on MOSFET
Grant 8,679,926 - Huang , et al. March 25, 2
2014-03-25
Transistor Performance Improving Method with Metal Gate
App 20130119485 - Masuoka; Yuri ;   et al.
2013-05-16
Semiconductor structure with dielectric-sealed doped region
Grant 8,415,749 - Huang , et al. April 9, 2
2013-04-09
Transistor performance improving method with metal gate
Grant 8,357,581 - Masuoka , et al. January 22, 2
2013-01-22
Method to improve dielectric quality in high-k metal gate technology
Grant 8,324,090 - Masuoka , et al. December 4, 2
2012-12-04
Local Charge and Work Function Engineering on MOSFET
App 20120003804 - Huang; Huan-Tsung ;   et al.
2012-01-05
Transistor Performance Improving Method With Metal Gate
App 20110303991 - Masuoka; Yuri ;   et al.
2011-12-15
Local charge and work function engineering on MOSFET
Grant 8,030,718 - Huang , et al. October 4, 2
2011-10-04
Transistor performance improving method with metal gate
Grant 8,012,817 - Masuoka , et al. September 6, 2
2011-09-06
Silicided metal gate for multi-threshold voltage configuration
Grant 7,768,072 - Tsai , et al. August 3, 2
2010-08-03
Method for forming a MOS device with reduced transient enhanced diffusion
Grant 7,759,210 - Huang , et al. July 20, 2
2010-07-20
Transistor Performance Improving Method With Metal Gate
App 20100078733 - Masuoka; Yuri ;   et al.
2010-04-01
Local Charge And Work Function Engineering On Mosfet
App 20100065925 - Huang; Huan-Tsung ;   et al.
2010-03-18
Method To Improve Dielectric Quality In High-k Metal Gate Technology
App 20100052063 - Masuoka; Yuri ;   et al.
2010-03-04
Semiconductor structure with dielectric-sealed doped region
App 20080258185 - Huang; Huan-Tsung ;   et al.
2008-10-23
Silicided metal gate for multi-threshold voltage configuration
App 20080237750 - Tsai; Ching-Wei ;   et al.
2008-10-02
Method for forming a most device with reduced transient enhanced diffusion
App 20080153238 - Huang; Huan-Tsung ;   et al.
2008-06-26
Transistor layout for standard cell with optimized mechanical stress effect
Grant 7,321,139 - Chang , et al. January 22, 2
2008-01-22
Transistor layout for standard cell with optimized mechanical stress effect
App 20070284618 - Chang; Mi-Chang ;   et al.
2007-12-13
Double-extension formation using offset spacer
App 20070114604 - Huang; Huan-Tsung ;   et al.
2007-05-24
Structure and method for extraction of parasitic junction capacitance in deep submicron technology
App 20050260776 - Wang, Yin-Pin ;   et al.
2005-11-24
Method for manufacturing a semiconductor device having an improved disposable spacer
Grant 6,960,512 - Cheng , et al. November 1, 2
2005-11-01
Method and structure for CMOS device with stress relaxed by ion implantation of carbon or oxygen containing ions
App 20050186722 - Cheng, Kuan-Lun ;   et al.
2005-08-25
Semiconductor device having improved short channel effects, and method of forming thereof
App 20050026342 - Fung, Ka-Hing ;   et al.
2005-02-03
Method For Manufacturing A Semiconductor Device Having An Improved Disposable Spacer
App 20040266122 - Cheng, Shui-Ming ;   et al.
2004-12-30

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