Huang; Eddy C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Huang; Eddy C..The latest application filed is for "tileable field-programmable gate array architecture".

Company Profile

0.19.7

Huang; Eddy C. - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus of memory clearing with monitoring RAM memory cells in a field programmable gated array Grant 7,482,835 - Sun , et al. January 27, 2	2009-01-27
Tileable Field-programmable Gate Array Architecture App 20080238477 - Feng; Sheng ; et al.	2008-10-02
Tileable field-programmable gate array architecture Grant 7,426,665 - Lien , et al. September 16, 2	2008-09-16
Tileable field-programmable gate array architecture Grant 7,342,416 - Feng , et al. March 11, 2	2008-03-11
Freeway Routing System For A Gate Array App 20070089082 - Liu; Tong ; et al.	2007-04-19
Tileable Field-programmable Gate Array Architecture App 20070075742 - Feng; Sheng ; et al.	2007-04-05
Tileable field-programmable gate array architecture Grant 7,157,938 - Feng , et al. January 2, 2	2007-01-02
Freeway routing system for a gate array Grant 7,137,095 - Liu , et al. November 14, 2	2006-11-14
Method and apparatus of memory clearing with monitoring RAM memory cells in a field programmable gated array Grant 7,126,856 - Sun , et al. October 24, 2	2006-10-24
Tileable field-programmable gate array architecture App 20060114024 - Feng; Sheng ; et al.	2006-06-01
Tileable field-programmable gate array architecture Grant 7,015,719 - Feng , et al. March 21, 2	2006-03-21
Method and apparatus of memory clearing with monitoring ram memory cells in a field programmable gated array App 20050206405 - Sun, Chung ; et al.	2005-09-22
Method and apparatus of memory clearing with monitoring RAM memory cells in a field programmable gated array Grant 6,937,063 - Sun , et al. August 30, 2	2005-08-30
Tileable field-programmable gate array architecture Grant 6,888,375 - Feng , et al. May 3, 2	2005-05-03
Tileable field-programmable gate array architecture Grant 6,870,396 - Lien , et al. March 22, 2	2005-03-22
Tileable field-programmable gate array architecture Grant 6,744,278 - Liu , et al. June 1, 2	2004-06-01
Routing structures for a tileable field-programmable gate array architecture Grant 6,731,133 - Feng , et al. May 4, 2	2004-05-04
Tileable field-programmable gate array architecture Grant 6,700,404 - Feng , et al. March 2, 2	2004-03-02
Tileable field-programmable gate array architecture App 20030218479 - Feng, Sheng ; et al.	2003-11-27
Tileable field-programmable gate array architecture App 20030201795 - Lien, Jung-Cheun ; et al.	2003-10-30
Tileable field-programmable gate array architecture Grant 6,611,153 - Lien , et al. August 26, 2	2003-08-26
Method and apparatus of memory clearing with monitoring memory cells Grant 6,531,891 - Sun , et al. March 11, 2	2003-03-11
Column redundancy circuitry with reduced time delay Grant 6,205,515 - Huang March 20, 2	2001-03-20
Dynamic CMOS register with a self-tracking clock Grant 5,936,449 - Huang August 10, 1	1999-08-10
Method and apparatus for providing output contention relief for digital buffers Grant 5,206,545 - Huang April 27, 1	1993-04-27
CMOS delay circuit with controllable delay Grant 5,121,014 - Huang June 9, 1	1992-06-09

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