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name:-0.017077922821045
name:-0.014736175537109
name:-0.0025880336761475
Huang; Chong Jen Patent Filings

Huang; Chong Jen

Patent Applications and Registrations

Patent applications and USPTO patent grants for Huang; Chong Jen.The latest application filed is for "self-calibrated system on a chip (soc)".

Company Profile
0.13.15
  • Huang; Chong Jen - Hsinchu TW
  • Huang; Chong-Jen - Taipei TW
  • HUANG; Chong Jen - Hsinchu City TW
  • Huang; Chong-Jen - Taipei County TW
  • Huang; Chong-Jen - Sanchung TW
  • Huang; Chong-Jen - Sanchong City TW
  • Huang, Chong-Jen - Hsin-chi City TW
  • Huang; Chong-Jen - Hsin-chi TW
  • Huang, Chong-Jen - Taipei City TW
  • Huang, Chong-Jen - Shanchung City TW
  • Huang, Chong-Jen - Sanchung City TW
  • Huang, Chong-Jen - Taipei Hsien TW
  • Huang; Chong-Jen - San-Chung TW
  • Huang, Chong-Jen - San-Chung City TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Self-calibrated system on a chip (SoC)
Grant 11,334,100 - Huang , et al. May 17, 2
2022-05-17
System-on-chip module for avoiding redundant memory access
Grant 11,126,560 - Huang , et al. September 21, 2
2021-09-21
Ticket dispenser
Grant D928,141 - Huang , et al. August 17, 2
2021-08-17
System-on-chip Module For Avoiding Redundant Memory Access
App 20210165740 - HUANG; Chong Jen ;   et al.
2021-06-03
SELF-CALIBRATED SYSTEM ON A CHIP (SoC)
App 20210165434 - HUANG; Chong Jen ;   et al.
2021-06-03
Method for forming oxide on ONO structure
Grant 7,919,372 - Wang , et al. April 5, 2
2011-04-05
Multi-layer semiconductor integrated circuits enabling stabilizing photolithography process parameters, the photomask being used, and the manufacturing method thereof
Grant 7,241,558 - Huang , et al. July 10, 2
2007-07-10
Method for Forming Oxide on Ono Structure
App 20070117353 - Wang; Chih Hao ;   et al.
2007-05-24
Method for forming oxide on ONO structure
Grant 7,183,166 - Wang , et al. February 27, 2
2007-02-27
Fabricating approach for memory device
App 20070026605 - Pan; Jen-Chun ;   et al.
2007-02-01
Method of fabricating read only memory and memory cell array
Grant 7,060,551 - Huang June 13, 2
2006-06-13
[method Of Fabricating Read Only Memory And Memory Cell Array]
App 20050282336 - Huang, Chong-Jen
2005-12-22
Method For Fabricating A Floating Gate Memory Device
App 20050277250 - Pan, Shyi-Shuh ;   et al.
2005-12-15
Method for fabricating a floating gate memory device
Grant 6,972,230 - Pan , et al. December 6, 2
2005-12-06
Pure CMOS latch-type fuse circuit
Grant 6,914,842 - Huang , et al. July 5, 2
2005-07-05
Method for forming oxide on ONO structure
App 20050110102 - Wang, Chih-Hao ;   et al.
2005-05-26
Pure CMOS latch-type fuse circuit
App 20050002262 - Huang, Chong-Jen ;   et al.
2005-01-06
Method for manufacturing a memory device
Grant 6,762,089 - Liu , et al. July 13, 2
2004-07-13
Multi-layer semiconductor integrated circuits enabling stabilizing photolithography process parameters, the photomask being used, and the manufacturing method thereof
App 20040087181 - Huang, Chong-Jen ;   et al.
2004-05-06
Method For Manufacturing A Memory Device
App 20040082128 - Liu, Kuang-Wen ;   et al.
2004-04-29
Memory device and manufacturing method thereof
Grant 6,664,586 - Liu , et al. December 16, 2
2003-12-16
Method utilizing dummy patterns to fabricate active region for stabilizing lithographic process
App 20030212981 - Huang, Chong-Jen ;   et al.
2003-11-13
Test structure for evaluating antenna effects
App 20030197175 - Huang, Chong-Jen ;   et al.
2003-10-23
Memory Device And Manufacturing Method Thereof
App 20030198095 - Liu, Kuang-Wen ;   et al.
2003-10-23
Memory array with salicide isolation
Grant 6,599,793 - Chou , et al. July 29, 2
2003-07-29
Memory array with salicide isolation
App 20020182797 - Chou, Ming-Hung ;   et al.
2002-12-05
Method for protecting insulation corners of shallow trenches by oxidation of poly silicon
App 20020090797 - Chen, Hsin-Huei ;   et al.
2002-07-11
Method for manufacturing flash memory device with dual floating gates and two bits per cell
Grant 6,271,090 - Huang , et al. August 7, 2
2001-08-07

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