Huang; Ching-Liou
Patent Applications and Registrations
Patent applications and USPTO patent grants for Huang; Ching-Liou.The latest application filed is for "device comprising first solder interconnects aligned in a first direction and second solder interconnects aligned in a second direction".
- Huang; Ching-Liou - San Diego CA
- Huang; Ching-Liou - Qionglin Township Hsinchu County TW
- Huang; Ching-Liou - Qionglin Township, Hsinchu County N/A TW
- Huang; Ching-Liou - Hsinchu County N/A TW
| Patent | Date |
|---|---|
| Device comprising first solder interconnects aligned in a first direction and second solder interconnects aligned in a second direction Grant 11,437,307 - Langari , et al. September 6, 2 | 2022-09-06 |
| Device Comprising First Solder Interconnects Aligned In A First Direction And Second Solder Interconnects Aligned In A Second Direction App 20210066177 - LANGARI; Abdolreza ; et al. | 2021-03-04 |
| Device comprising first solder interconnects aligned in a first direction and second solder interconnects aligned in a second direction Grant 10,916,494 - Langari , et al. February 9, 2 | 2021-02-09 |
| Device Comprising First Solder Interconnects Aligned In A First Direction And Second Solder Interconnects Aligned In A Second Di App 20200211943 - LANGARI; Abdolreza ; et al. | 2020-07-02 |
| Semiconductor package Grant 10,312,210 - Huang , et al. | 2019-06-04 |
| Semiconductor Package App 20180233476 - Huang; Ching-Liou ; et al. | 2018-08-16 |
| Semiconductor package Grant 9,972,593 - Huang , et al. May 15, 2 | 2018-05-15 |
| Semiconductor package Grant 9,659,893 - Lin , et al. May 23, 2 | 2017-05-23 |
| Semiconductor package with trace covered by solder resist Grant 9,640,505 - Lin , et al. May 2, 2 | 2017-05-02 |
| Semiconductor package Grant 9,548,271 - Chan , et al. January 17, 2 | 2017-01-17 |
| Semiconductor Package App 20160133594 - HUANG; Ching-Liou ; et al. | 2016-05-12 |
| Semiconductor Package App 20160056105 - CHAN; Kuei-Ti ; et al. | 2016-02-25 |
| Semiconductor Package App 20150357291 - LIN; Tzu-Hung ; et al. | 2015-12-10 |
| Semiconductor package Grant 9,209,148 - Chan , et al. December 8, 2 | 2015-12-08 |
| Semiconductor Package App 20150348932 - LIN; Tzu-Hung ; et al. | 2015-12-03 |
| Semiconductor package with solder resist capped trace to prevent underfill delamination Grant 9,142,526 - Lin , et al. September 22, 2 | 2015-09-22 |
| Semiconductor Package App 20150194403 - CHAN; Kuei-Ti ; et al. | 2015-07-09 |
| Semiconductor package Grant 8,987,897 - Chan , et al. March 24, 2 | 2015-03-24 |
| Semiconductor Package App 20140091481 - LIN; Tzu-Hung ; et al. | 2014-04-03 |
| Flip-chip Package App 20140042615 - HUANG; Ching-Liou ; et al. | 2014-02-13 |
| Semiconductor package Grant 8,633,588 - Lin , et al. January 21, 2 | 2014-01-21 |
| Package substrate for bump on trace interconnection Grant 8,502,377 - Lin , et al. August 6, 2 | 2013-08-06 |
| Semiconductor Package App 20130161810 - Lin; Tzu-Hung ; et al. | 2013-06-27 |
| Semiconductor Package App 20120126368 - Chan; Kuei-Ti ; et al. | 2012-05-24 |
| Package Substrate For Bump On Trace Interconnection App 20120032343 - Lin; Tzu-Hung ; et al. | 2012-02-09 |
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