Hu; Yong-Zhong
Patent Applications and Registrations
Patent applications and USPTO patent grants for Hu; Yong-Zhong.The latest application filed is for "switch capable of decreasing parasitic inductance".
- Hu; Yong-Zhong - Hsinchu TW
- Hu; Yong-Zhong - Cupertino CA
| Patent | Date |
|---|---|
| High Voltage Device And Manufacturing Method Thereof App 20220223464 - Yu; Kun-Huang ; et al. | 2022-07-14 |
| Switch Capable Of Decreasing Parasitic Inductance App 20220224325 - Yu; Kun-Huang ; et al. | 2022-07-14 |
| Chip Packaging Structure App 20220208628 - Lin; Shih-Chieh ; et al. | 2022-06-30 |
| Chip Packaging Method And Chip Package Unit App 20220181238 - Yen; Hao-Lin ; et al. | 2022-06-09 |
| Chip Packaging Method And Chip Package Unit App 20220181237 - Yen; Hao-Lin ; et al. | 2022-06-09 |
| Chip Packaging Method And Chip Package Unit App 20220157622 - Huang; Heng-Chi ; et al. | 2022-05-19 |
| Power semiconductor devices Grant 11,183,495 - Lee , et al. November 23, 2 | 2021-11-23 |
| Power Semiconductor Devices App 20190348412 - LEE; Sun-hak ; et al. | 2019-11-14 |
| Power semiconductor devices Grant 10,366,981 - Lee , et al. July 30, 2 | 2019-07-30 |
| Power Semiconductor Devices App 20160071837 - LEE; Sun-hak ; et al. | 2016-03-10 |
| Method to manufacture split gate with high density plasma oxide layer as inter-polysilicon insulation layer Grant 8,053,315 - Tai , et al. November 8, 2 | 2011-11-08 |
| Method to manufacture split gate with high density plasma oxide layer as inter-polysilicon insulation layer App 20100099230 - Tai; Sung-Shan ; et al. | 2010-04-22 |
| Split gate formation with high density plasma (HDP) oxide layer as inter-polysilicon insulation layer App 20080150013 - Tai; Sung-Shan ; et al. | 2008-06-26 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.
| 