loadpatents
name:-0.016647815704346
name:-0.014599800109863
name:-0.0035231113433838
HU; Chi Wei Patent Filings

HU; Chi Wei

Patent Applications and Registrations

Patent applications and USPTO patent grants for HU; Chi Wei.The latest application filed is for "method and layout of an integrated circuit".

Company Profile
3.15.15
  • HU; Chi Wei - Hsinchu TW
  • Hu; Chi Wei - Pingzhen TW
  • HU; Chi Wei - Pingzhen City TW
  • Hu; Chi-Wei - Taoyuan County TW
  • Hu; Chi-Wei - Kaohsiung N/A TW
  • Hu; Chi-Wei - Kaohsiung City TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method And Layout Of An Integrated Circuit
App 20220284165 - HANCHINAL; Mahantesh ;   et al.
2022-09-08
Method and layout of an integrated circuit
Grant 11,341,308 - Hanchinal , et al. May 24, 2
2022-05-24
Method And Layout Of An Integrated Circuit
App 20210173996 - HANCHINAL; Mahantesh ;   et al.
2021-06-10
Method and layout of an integrated circuit
Grant 10,936,780 - Hanchinal , et al. March 2, 2
2021-03-02
Method And Layout Of An Integrated Circuit
App 20190392108 - HANCHINAL; Mahantesh ;   et al.
2019-12-26
Method and layout of an integrated circuit
Grant 10,402,529 - Hanchinal , et al. Sep
2019-09-03
System and method for multi-patterning
Grant 10,268,791 - Lin , et al.
2019-04-23
Method And Layout Of An Integrated Circuit
App 20180144082 - HANCHINAL; Mahantesh ;   et al.
2018-05-24
System And Method For Multi-patterning
App 20170169154 - LIN; Yen-Hung ;   et al.
2017-06-15
Method, system and computer program product for generating layout for semiconductor device
Grant 9,659,133 - Lin , et al. May 23, 2
2017-05-23
Tier based layer promotion and demotion
Grant 9,436,793 - Lin , et al. September 6, 2
2016-09-06
Semiconductor arrangement formation
Grant 9,405,880 - Lin , et al. August 2, 2
2016-08-02
Semiconductor Arrangement Formation
App 20150331990 - Lin; Yen-Hung ;   et al.
2015-11-19
Tier Based Layer Promotion And Demotion
App 20150213178 - Lin; Yen-Hung ;   et al.
2015-07-30
Method, System And Computer Program Product For Generating Layout For Semiconductor Device
App 20150113493 - LIN; Yen-Hung ;   et al.
2015-04-23
Method for placing decoupling capacitors
Grant 8,739,097 - Hu , et al. May 27, 2
2014-05-27
Method For Placing Decoupling Capacitors
App 20140082575 - Hu; Chi-Wei ;   et al.
2014-03-20
Apparatus and method for on-chip sampling of dynamic IR voltage drop
Grant 8,614,571 - Tseng , et al. December 24, 2
2013-12-24
Printable photovoltaic electrochromic device and module
Grant 8,508,834 - Huang , et al. August 13, 2
2013-08-13
Apparatus And Method For On-chip Sampling Of Dynamic Ir Voltage Drop
App 20130127441 - TSENG; Nan-Hsin ;   et al.
2013-05-23
System and method for reducing processor power consumption
Grant 8,347,132 - Lu , et al. January 1, 2
2013-01-01
System and method for characterizing process variations
Grant 8,258,883 - Chen , et al. September 4, 2
2012-09-04
Printable Photovoltaic Electrochromic Device And Module
App 20120140310 - Huang; Lee-May ;   et al.
2012-06-07
System and Method for Characterizing Process Variations
App 20100176890 - Chen; Yi-Wei ;   et al.
2010-07-15
System and Method for Reducing Processor Power Consumption
App 20100174933 - Lu; Lee-Chung ;   et al.
2010-07-08

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