| Patent | Date |
|---|
Non-volatile memory device and manufacturing method thereof
Grant 11,362,099 - Chen , et al. June 14, 2 | 2022-06-14 |
Memory Structure And Manufacturing Method Thereof
App 20210351274 - Hsue; Chen-Chiu ; et al. | 2021-11-11 |
Memory structure and manufacturing method thereof
Grant 11,171,217 - Hsue , et al. November 9, 2 | 2021-11-09 |
Non-volatile Memory Device And Manufacturing Method Thereof
App 20210265368 - Chen; Ching-Hua ; et al. | 2021-08-26 |
Photosensitive device
Grant 7,411,276 - Huang , et al. August 12, 2 | 2008-08-12 |
Flash memory cell and manufacturing method thereof
Grant 7,183,606 - Wang , et al. February 27, 2 | 2007-02-27 |
Photosensitive structure and method of fabricating the same
App 20070004075 - Huang; Ming-Jeng ; et al. | 2007-01-04 |
Method of fabricating a photosensitive structure
Grant 7,125,738 - Huang , et al. October 24, 2 | 2006-10-24 |
Method For Manufacturing One-time Electrically Programmable Read Only Memory
App 20060154418 - Chang; Ko-Hsing ; et al. | 2006-07-13 |
Method for manufacturing one-time electrically programmable read only memory
Grant 7,074,674 - Chang , et al. July 11, 2 | 2006-07-11 |
Photosensitive structure and method of fabricating the same
App 20060084194 - Huang; Ming-Jeng ; et al. | 2006-04-20 |
Flash Memory Cell And Manufacturing Method Thereof
App 20050255658 - Wang, Leo ; et al. | 2005-11-17 |
Flash memory cell
Grant 6,953,963 - Wang , et al. October 11, 2 | 2005-10-11 |
[flash Memory Cell And Manufacturing Method Thereof]
App 20050051833 - Wang, Leo ; et al. | 2005-03-10 |
Dual damascene process using metal hard mask
Grant 6,696,222 - Hsue , et al. February 24, 2 | 2004-02-24 |
Method For Improving Adhesion Of A Low K Dielectric To A Barrier Layer
App 20030228750 - Lee, Shyh-Dar ; et al. | 2003-12-11 |
Method for improving adhesion of a low k dielectric to a barrier layer
Grant 6,649,512 - Lee , et al. November 18, 2 | 2003-11-18 |
Capacitor with lower electrode located at the same level as an interconnect line
Grant 6,603,167 - Hsue , et al. August 5, 2 | 2003-08-05 |
Method of forming identifying mark on semiconductor wafer
App 20030141605 - Lee, Shyh-Dar ; et al. | 2003-07-31 |
Method of fabricating an IMD layer to improve global planarization in subsequent CMP
App 20030119301 - Hsue, Chen-Chiu ; et al. | 2003-06-26 |
Interconnect structure capped with a metallic barrier layer and method fabrication thereof
App 20030116826 - Hsue, Chen-Chiu ; et al. | 2003-06-26 |
Interconnect structure with a cap layer on an IMD layer and a method of formation thereof
App 20030075807 - Hsue, Chen-Chiu ; et al. | 2003-04-24 |
Process for preparing porous low dielectric constant material
App 20030044532 - Lee, Shyh-Dar ; et al. | 2003-03-06 |
Dual damascene process using metal hard mask
App 20030044725 - Hsue, Chen-Chiu ; et al. | 2003-03-06 |
Method Of Forming A Metallic Interconnect Structure With A Metallic Spacer
App 20030038371 - Hsue, Chen-Chiu ; et al. | 2003-02-27 |
Method for forming selective protection layers on copper interconnects
Grant 6,521,523 - Lee , et al. February 18, 2 | 2003-02-18 |
Selective barrier metal fabricated for interconnect structure manufacturing process
App 20030008495 - Hsue, Chen-Chiu ; et al. | 2003-01-09 |
Method For Forming Selective Protection Layers On Copper Interconnects
App 20020192940 - Lee, Shyh-Dar ; et al. | 2002-12-19 |
Method For Forming A Metal Capacitor In A Damascene Process
App 20020192921 - Hsue, Chen-Chiu ; et al. | 2002-12-19 |
Metal Capacitor In Damascene Structures
App 20020190299 - Hsue, Chen-Chiu ; et al. | 2002-12-19 |
Metal Capacitors With Damascene Structures
App 20020190386 - Hsue, Chen-Chiu ; et al. | 2002-12-19 |
Capacitor with lower electrode located at the same level as an interconnect line
App 20020190301 - Hsue, Chen-Chiu ; et al. | 2002-12-19 |
Method For Fabricating Polysilicon Capacitor
App 20020192922 - Hsue, Chen-Chiu ; et al. | 2002-12-19 |
Metal Capacitors With Damascene Structures And Method For Forming The Same
App 20020190300 - Hsue, Chen-Chiu ; et al. | 2002-12-19 |
Method for forming a metal capacitor in a damascene process
Grant 6,492,226 - Hsue , et al. December 10, 2 | 2002-12-10 |
Interconnect structure manufacturing process
App 20020182850 - Hsue, Chen-Chiu ; et al. | 2002-12-05 |
Interconnects with dual dielectric spacers and method for forming the same
App 20020177080 - Chung, Cheng-Hui ; et al. | 2002-11-28 |
Interconnects with dielectric spacers and method for forming the same
App 20020177299 - Lin, Yei-Hsiung ; et al. | 2002-11-28 |
Dual damascene process using an oxide liner for a dielectric barrier layer
App 20020155695 - Lee, Shyh-Dar ; et al. | 2002-10-24 |
Electrostatic discharge effect free mask
App 20020115001 - Hsue, Chen-Chiu ; et al. | 2002-08-22 |
Method for forming a metal capacitor in a damascene process
Grant 6,410,386 - Hsue , et al. June 25, 2 | 2002-06-25 |
Method for fabricating metal capacitor
Grant 6,358,792 - Hsue , et al. March 19, 2 | 2002-03-19 |
Method for forming metal capacitors with a damascene process
Grant 6,338,999 - Hsue , et al. January 15, 2 | 2002-01-15 |
Method of forming a capacitor
Grant 5,946,571 - Hsue , et al. August 31, 1 | 1999-08-31 |
Trench surrounded metal pattern
Grant 5,924,006 - Lur , et al. July 13, 1 | 1999-07-13 |
Method of making a blanket N-well structure for SRAM data stability in P-type substrates
Grant 5,858,826 - Lee , et al. January 12, 1 | 1999-01-12 |
Planar field oxide isolation process for semiconductor integrated circuit devices using liquid phase deposition
Grant 5,849,625 - Hsue , et al. December 15, 1 | 1998-12-15 |
Method and apparatus for reflowing and annealing borophosphosilicate glass
Grant 5,828,036 - Hsue , et al. October 27, 1 | 1998-10-27 |
Polycide bonding pad structure
Grant 5,734,200 - Hsue , et al. March 31, 1 | 1998-03-31 |
Process for fabricating a stacked capacitor
Grant 5,716,884 - Hsue , et al. February 10, 1 | 1998-02-10 |
Multiple cell with common bit line contact and method of manufacture thereof
Grant 5,712,500 - Hsue , et al. January 27, 1 | 1998-01-27 |
Multiple well device and process of manufacture
Grant 5,698,458 - Hsue , et al. December 16, 1 | 1997-12-16 |
Method of forming bit lines having lower conductivity in their respective edges
Grant 5,672,532 - Hsue , et al. September 30, 1 | 1997-09-30 |
Process for creating high density integrated circuits utilizing double coating photoresist mask
Grant 5,667,940 - Hsue , et al. September 16, 1 | 1997-09-16 |
Method of bonding an aluminum wire to an intergrated circuit bond pad
Grant 5,661,081 - Hsue , et al. August 26, 1 | 1997-08-26 |
Post-titanium nitride mask ROM programming method and device manufactured thereby
Grant 5,654,576 - Hsue , et al. August 5, 1 | 1997-08-05 |
Double poly high density buried bit line mask ROM
Grant 5,578,857 - Hong , et al. November 26, 1 | 1996-11-26 |
Process for forming a butting contact through a gate electrode
Grant 5,521,113 - Hsue , et al. May 28, 1 | 1996-05-28 |
Method of fabricating an asymmetric lightly doped drain transistor device
Grant 5,510,279 - Chien , et al. April 23, 1 | 1996-04-23 |
Self-aligned anti-punchthrough implantation process
Grant 5,484,743 - Ko , et al. January 16, 1 | 1996-01-16 |
Method of manufacture of semiconductor memory device with multiple, orthogonally disposed conductors
Grant 5,480,822 - Hsue , et al. January 2, 1 | 1996-01-02 |
Process for fabrication of an SRAM cell having a highly doped storage node
Grant 5,472,899 - Hsue , et al. December 5, 1 | 1995-12-05 |
Method for making fin-shaped stack capacitors on DRAM chips
Grant 5,460,999 - Hong , et al. October 24, 1 | 1995-10-24 |
Symmetric SRAM cell with buried N+ local interconnection line
Grant 5,461,251 - Yang , et al. October 24, 1 | 1995-10-24 |
Method of making top floating-gate flash EEPROM structure
Grant 5,457,061 - Hong , et al. October 10, 1 | 1995-10-10 |
Double polysilicon electrostatic discharge protection device for SRAM and DRAM memory devices
Grant 5,455,444 - Hsue October 3, 1 | 1995-10-03 |
Process on thickness control for silicon-on-insulator technology
Grant 5,449,638 - Hong , et al. September 12, 1 | 1995-09-12 |
Grounding method to eliminate the antenna effect in VLSI process
Grant 5,434,108 - Ko , et al. July 18, 1 | 1995-07-18 |
Method of forming a stacked capacitor using sidewall spacers and local oxidation
Grant 5,429,980 - Yang , et al. July 4, 1 | 1995-07-04 |
Process for producing memory devices having narrow buried N+ lines
Grant 5,418,176 - Yang , et al. May 23, 1 | 1995-05-23 |
Process for flat-cell mask ROM integrated circuit
Grant 5,418,175 - Hsue , et al. May 23, 1 | 1995-05-23 |
Method of forming a DRAM stacked capacitor cell
Grant 5,413,950 - Chen , et al. May 9, 1 | 1995-05-09 |
Process for fabricating double poly high density buried bit line mask ROM
Grant 5,393,233 - Hong , et al. February 28, 1 | 1995-02-28 |
Dram capacitor structure
Grant 5,380,673 - Yang , et al. January 10, 1 | 1995-01-10 |
Method for ESD protection improvement
Grant 5,374,565 - Hsue , et al. December 20, 1 | 1994-12-20 |
Preferential oxidization self-aligned contact technology
Grant 5,115,296 - Hsue , et al. May 19, 1 | 1992-05-19 |
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