Hsu; Louis Lu-Chen

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hsu; Louis Lu-Chen.The latest application filed is for "microelectronic 3d packaging structure and method of manufacturing the same".

Company Profile

2.126.114

Hsu; Louis Lu-Chen - Taipei TW
Hsu; Louis Lu-Chen - Longtan Township TW
Hsu; Louis Lu-Chen - Fishkill NY
HSU; Louis Lu-Chen - Taipei City TW
Hsu; Louis Lu-chen - Dutchess County NY
Hsu; Louis Lu-Chen - New York NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Ambient light adjustment apparatus, method and system Grant 9,423,665 - Lin , et al. August 23, 2	2016-08-23
Portable analytical device and system Grant 9,357,955 - Lu , et al. June 7, 2	2016-06-07
Microelectronic 3D packaging structure and method of manufacturing the same Grant 9,288,907 - Hu , et al. March 15, 2	2016-03-15
3D chip stack having encapsulated chip-in-chip Grant 9,219,023 - Farooq , et al. December 22, 2	2015-12-22
Microelectronic 3d Packaging Structure And Method Of Manufacturing The Same App 20150271921 - HU; SHAO-CHUNG ; et al.	2015-09-24
Methods, Systems, Electronic Devices, And Non-transitory Computer Readable Storage Medium Media For Behavior Based User Interface Layout Display (build) App 20150268838 - WANG; Wen-Nan ; et al.	2015-09-24
Ambient Light Adjustment Apparatus, Method And System App 20150268529 - Lin; Hsueh-Chin ; et al.	2015-09-24
Portable Analytical Device And System App 20150265193 - Lu; Hui-Hsin ; et al.	2015-09-24
Forming semiconductor chip connections Grant 8,802,497 - Hsu , et al. August 12, 2	2014-08-12
Method of fabricating field effect transistors with low k sidewall spacers Grant 8,580,646 - Cheng , et al. November 12, 2	2013-11-12
FinFET with reduced gate to fin overlay sensitivity Grant 8,518,767 - Cheng , et al. August 27, 2	2013-08-27
3d Chip Stack Having Encapsulated Chip-in-chip App 20130193574 - Farooq; Mukta G. ; et al.	2013-08-01
Forming semiconductor chip connections Grant 8,236,610 - Hsu , et al. August 7, 2	2012-08-07
Forming Semiconductor Chip Connections App 20120187561 - Hsu; Louis Lu-Chen ; et al.	2012-07-26
3D chip-stack with fuse-type through silicon via Grant 8,211,756 - Feng , et al. July 3, 2	2012-07-03
Finfet With Reduced Gate To Fin Overlay Sensitivity App 20120146112 - Cheng; Kangguo ; et al.	2012-06-14
Field Effect Transistors With Low K Sidewall Spacers And Methods Of Fabricating Same App 20120126342 - Cheng; Kangguo ; et al.	2012-05-24
Active inductor for ASIC application Grant 8,115,575 - Hsu , et al. February 14, 2	2012-02-14
Thermoelectric 3D cooling Grant 8,030,113 - Hsu , et al. October 4, 2	2011-10-04
3d Chip Stack Having Encapsulated Chip-in-chip App 20110175215 - Farooq; Mukta G. ; et al.	2011-07-21
Structures incorporating semiconductor device structures with reduced junction capacitance and drain induced barrier lowering Grant 7,984,408 - Cheng , et al. July 19, 2	2011-07-19
Structures incorporating interconnect structures with improved electromigration resistance Grant 7,984,409 - Hsu , et al. July 19, 2	2011-07-19
Contact forming method and related semiconductor device Grant 7,968,949 - Edelstein , et al. June 28, 2	2011-06-28
Dielectric material with a reduced dielectric constant and methods of manufacturing the same Grant 7,948,084 - Hsu , et al. May 24, 2	2011-05-24
Method and apparatus for making coplanar isolated regions of different semiconductor materials on a substrate Grant 7,947,566 - Chen , et al. May 24, 2	2011-05-24
Thermoelectric 3D Cooling App 20110104846 - Hsu; Louis Lu-Chen ; et al.	2011-05-05
Programmable through silicon via Grant 7,930,664 - Feng , et al. April 19, 2	2011-04-19
Semiconductor FinFET structures with encapsulated gate electrodes and methods for forming such semiconductor FinFET structures Grant 7,915,682 - Hsu , et al. March 29, 2	2011-03-29
Leakage current mitigation in a semiconductor device Grant 7,911,263 - Guo , et al. March 22, 2	2011-03-22
Semiconductor device structures with self-aligned doped regions and methods for forming such semiconductor device structures Grant 7,898,014 - Cheng , et al. March 1, 2	2011-03-01
Thermoelectric 3D cooling Grant 7,893,529 - Hsu , et al. February 22, 2	2011-02-22
Programmable Through Silicon Via App 20110034021 - Feng; Kai Di ; et al.	2011-02-10
Hybrid oriented substrates and crystal imprinting methods for forming such hybrid oriented substrates Grant 7,875,960 - Hsu , et al. January 25, 2	2011-01-25
Three-dimensional chip-stack synchronization Grant 7,863,960 - Wang , et al. January 4, 2	2011-01-04
Leakage Current Mitigation in a Semiconductor Device App 20100327958 - Guo; Jong-Ru ; et al.	2010-12-30
Forming Semiconductor Chip Connections App 20100301475 - Hsu; Louis Lu-Chen ; et al.	2010-12-02
Programmable through silicon via Grant 7,839,163 - Feng , et al. November 23, 2	2010-11-23
Method and structure to reduce contact resistance on thin silicon-on-insulator device Grant 7,833,873 - Greene , et al. November 16, 2	2010-11-16
Three-dimensional Chip-stack Synchronization App 20100277210 - Wang; Ping-Chuan ; et al.	2010-11-04
3D chip-stack with fuse-type through silicon via Grant 7,816,945 - Feng , et al. October 19, 2	2010-10-19
3d Chip-stack With Fuse-type Through Silicon Via App 20100261318 - Feng; Kai Di ; et al.	2010-10-14
Apparatus for implementing enhanced hand shake protocol in microelectronic communication systems Grant 7,809,340 - Hsu , et al. October 5, 2	2010-10-05
Crystal imprinting methods for fabricating substrates with thin active silicon layers Grant 7,803,700 - Hsu , et al. September 28, 2	2010-09-28
Electronic fuses in semiconductor integrated circuits Grant 7,785,934 - Hsu , et al. August 31, 2	2010-08-31
BEOL interconnect structures with simultaneous high-k and low-k dielectric regions Grant 7,768,130 - Hsu , et al. August 3, 2	2010-08-03
3d Chip-stack With Fuse-type Through Silicon Via App 20100182041 - Feng; Kai Di ; et al.	2010-07-22
Programmable Through Silicon Via App 20100182040 - Feng; Kai Di ; et al.	2010-07-22
Thermoelectric 3d Cooling App 20100176506 - Hsu; Louis Lu-Chen ; et al.	2010-07-15
Semiconductor device structures for bipolar junction transistors and methods of fabricating such structures Grant 7,737,530 - Cheng , et al. June 15, 2	2010-06-15
Device and method for fabricating double-sided SOI wafer scale package with optical through via connections Grant 7,736,949 - Chen , et al. June 15, 2	2010-06-15
Dielectric material with reduced dielectric constant and methods of manufacturing the same Grant 7,732,322 - Hsu , et al. June 8, 2	2010-06-08
Structure and method for producing multiple size interconnections Grant 7,714,452 - Clevenger , et al. May 11, 2	2010-05-11
Method and structure to reduce contact resistance on thin silicon-on-insulator device Grant 7,687,865 - Greene , et al. March 30, 2	2010-03-30
Process for making a MCSFET Grant 7,682,913 - Ouyang , et al. March 23, 2	2010-03-23
Interconnect structures with improved electromigration resistance and methods for forming such interconnect structures Grant 7,666,781 - Hsu , et al. February 23, 2	2010-02-23
Active Inductor For Asic Application App 20100039191 - Hsu; Louis Lu-Chen ; et al.	2010-02-18
Patterned silicon-on-insulator layers and methods for forming the same Grant 7,659,599 - Booth, Jr. , et al. February 9, 2	2010-02-09
Semiconductor device structures with reduced junction capacitance and drain induced barrier lowering and methods for fabricating such device structures and for fabricating a semiconductor-on-insulator substrate Grant 7,659,178 - Cheng , et al. February 9, 2	2010-02-09
eFuse and methods of manufacturing the same Grant 7,659,168 - Hsu , et al. February 9, 2	2010-02-09
Hybrid oriented substrates and crystal imprinting methods for forming such hybrid oriented substrates Grant 7,651,929 - Hsu , et al. January 26, 2	2010-01-26
Electrically programmable fuse structures with terminal portions residing at different heights, and methods of fabrication thereof Grant 7,645,645 - Hovis , et al. January 12, 2	2010-01-12
Power network reconfiguration using MEM switches Grant 7,624,289 - Cranford, Jr. , et al. November 24, 2	2009-11-24
Design structure for an automatic driver/transmission line/receiver impedance matching circuitry Grant 7,622,946 - Abadeer , et al. November 24, 2	2009-11-24
Semiconductor device structures for bipolar junction transistors and methods of fabricating such structures Grant 7,618,872 - Cheng , et al. November 17, 2	2009-11-17
Body-contacted semiconductor structures and methods of fabricating such body-contacted semiconductor structures Grant 7,608,506 - Cheng , et al. October 27, 2	2009-10-27
PFETs and methods of manufacturing the same Grant 7,569,434 - Cheng , et al. August 4, 2	2009-08-04
Patterned silicon-on-insulator layers and methods for forming the same Grant 7,566,629 - Booth, Jr. , et al. July 28, 2	2009-07-28
Fin PIN diode Grant 7,560,784 - Cheng , et al. July 14, 2	2009-07-14
Electronic fuse with conformal fuse element formed over a freestanding dielectric spacer Grant 7,545,253 - Hsu , et al. June 9, 2	2009-06-09
Method And Apparatus For Making Coplanar Isolated Regions Of Different Semiconductor Materials On A Substrate App 20090121312 - Chen; Howard Hao ; et al.	2009-05-14
Reduced-resistance finFETs by sidewall silicidation and methods of manufacturing the same Grant 7,531,423 - Cheng , et al. May 12, 2	2009-05-12
Design Structure for an Automatic Driver/Transmission Line/Receiver Impedance Matching Circuitry App 20090115448 - Abadeer; Wagdi W. ; et al.	2009-05-07
Pillar P-i-n semiconductor diodes Grant 7,525,170 - Hsu , et al. April 28, 2	2009-04-28
Coplanar silicon-on-insulator (SOI) regions of different crystal orientations and methods of making the same Grant 7,525,121 - Hsu , et al. April 28, 2	2009-04-28
Memory array peripheral structures and use Grant 7,515,502 - Ahsan , et al. April 7, 2	2009-04-07
Memory Array Peripheral Structures And Use App 20090073796 - Ahsan; Ishtiaq ; et al.	2009-03-19
Design structures incorporating interconnect structures with liner repair layers Grant 7,494,916 - Hsu , et al. February 24, 2	2009-02-24
Ferromagnetic memory cell and methods of making and using the same Grant 7,491,994 - Cheng , et al. February 17, 2	2009-02-17
Device and method for fabricating double-sided SOI wafer scale package with optical through via connections Grant 7,489,025 - Chen , et al. February 10, 2	2009-02-10
Semiconductor device structures for bipolar junction transistors Grant 7,482,672 - Cheng , et al. January 27, 2	2009-01-27
Method to reduce contact resistance on thin silicon-on-insulator device Grant 7,479,437 - Greene , et al. January 20, 2	2009-01-20
Hybrid oriented substrates and crystal imprinting methods for forming such hybrid oriented substrates Grant 7,473,985 - Hsu , et al. January 6, 2	2009-01-06
Integrated Fin-Local Interconnect Structure App 20090007036 - Cheng; Kangguo ; et al.	2009-01-01
Hybrid Fully-Silicided (FUSI)/Partially-Silicided (PASI) Structures App 20090001477 - Hsu; Louis Lu-Chen ; et al.	2009-01-01
Hybrid Fully-Silicided (FUSI)/Partially-Silicided (PASI) Structures App 20090007037 - Hsu; Louis Lu-Chen ; et al.	2009-01-01
Integrated Fin-Local Interconnect Structure App 20090001426 - Cheng; Kangguo ; et al.	2009-01-01
Systems and methods for controlling of electro-migration Grant 7,471,101 - Cranford, Jr. , et al. December 30, 2	2008-12-30
Device And Method For Fabricating Double-sided Soi Wafer Scale Package With Optical Through Via Connections App 20080318360 - CHEN; HOWARD HAO ; et al.	2008-12-25
Electronic fuse with conformal fuse element formed over a freestanding dielectric spacer Grant 7,460,003 - Hsu , et al. December 2, 2	2008-12-02
Test Structures And Methodology For Detecting Hot Defects App 20080286888 - Hsu; Louis Lu-Chen ; et al.	2008-11-20
Hybrid Oriented Substrates And Crystal Imprinting Methods For Forming Such Hybrid Oriented Substrates App 20080283920 - Hsu; Louis Lu-Chen ; et al.	2008-11-20
Method And Structure To Reduce Contact Resistance On Thin Silicon-on-insulator Device App 20080272412 - Greene; Brian J. ; et al.	2008-11-06
Method And Structure To Reduce Contact Resistance On Thin Silicon-on-insulator Device App 20080274597 - Greene; Brian J. ; et al.	2008-11-06
Electronic Fuse With Conformal Fuse Element Formed Over A Freestanding Dielectric Spacer App 20080258857 - Hsu; Louis Lu-Chen ; et al.	2008-10-23
Coplanar silicon-on-insulator (SOI) regions of different crystal orientations and methods of making the same Grant 7,439,108 - Hsu , et al. October 21, 2	2008-10-21
Semiconductor Device Structures For Bipolar Junction Transistors And Methods Of Fabricating Such Structures App 20080224175 - Cheng; Kangguo ; et al.	2008-09-18
Apparatus For Implementing Enhanced Hand Shake Protocol In Microelectronic Communication Systems App 20080227425 - Hsu; Louis Lu-Chen ; et al.	2008-09-18
Systems and Methods for Controlling of Electro-Migration App 20080217614 - Cranford; Hayden Clavie ; et al.	2008-09-11
Automatic Driver/Transmission Line/Receiver Impedance Matching Circuitry App 20080218290 - Abadeer; Wagdi W. ; et al.	2008-09-11
Semiconductor Device Structures For Bipolar Junction Transistors And Methods Of Fabricating Such Structures App 20080220583 - Cheng; Kangguo ; et al.	2008-09-11
Electronic Fuses In Semiconductor Integrated Circuits App 20080206978 - Hsu; Louis Lu-Chen ; et al.	2008-08-28
FinFET with Reduced Gate to Fin Overlay Sensitivity App 20080203468 - Cheng; Kangguo ; et al.	2008-08-28
Method for implementing enhanced hand shake protocol in microelectronic communication systems Grant 7,412,211 - Hsu , et al. August 12, 2	2008-08-12
Fin Pin Diode App 20080185691 - Cheng; Kangguo ; et al.	2008-08-07
Systems and methods for controlling of electro-migration Grant 7,408,374 - Cranford, Jr. , et al. August 5, 2	2008-08-05
Contact Forming Method And Related Semiconductor Device App 20080179660 - Edelstein; Daniel C. ; et al.	2008-07-31
Method and apparatus for making coplanar dielectrically-isolated regions of different semiconductor materials on a substrate Grant 7,399,686 - Chen , et al. July 15, 2	2008-07-15
Monitoring system for detecting and characterizing classes of leakage in CMOS devices Grant 7,397,261 - Hsu , et al. July 8, 2	2008-07-08
Interconnect structures with linear repair layers and methods for forming such interconnection structures Grant 7,396,762 - Hsu , et al. July 8, 2	2008-07-08
Patterned Silicon-on-insulator Layers And Methods For Forming The Same App 20080157261 - Booth,; Roger Allen ; et al.	2008-07-03
Coplanar silicon-on-insulator (SOI) regions of different crystal orientations and methods of making the same Grant 7,393,730 - Hsu , et al. July 1, 2	2008-07-01
Crystal Imprinting Methods For Fabricating Substrates With Thin Active Silicon Layers App 20080146006 - Hsu; Louis Lu-Chen ; et al.	2008-06-19
Semiconductor FinFET structures with encapsulated gate electrodes and methods for forming such semiconductor FinFET structures Grant 7,384,838 - Hsu , et al. June 10, 2	2008-06-10
Interconnect Structures with Liner Repair Layers and Methods for Forming Such Interconnection Structures App 20080122090 - Hsu; Louis Lu-Chen ; et al.	2008-05-29
Design Structures Incorporating Interconnect Structures with Improved Electromigration Resistance App 20080120580 - Hsu; Louis Lu-Chen ; et al.	2008-05-22
Interconnect Structures with Improved Electromigration Resistance and Methods for Forming Such Interconnect Structures App 20080116582 - Hsu; Louis Lu-Chen ; et al.	2008-05-22
Power Network Reconfiguration Using Mem Switches App 20080091961 - Cranford; Hayden C. JR. ; et al.	2008-04-17
Crystal imprinting methods for fabricating substrates with thin active silicon layers Grant 7,358,164 - Hsu , et al. April 15, 2	2008-04-15
P-i-n Semiconductor Diodes And Methods Of Forming The Same App 20080083963 - Hsu; Louis Lu-Chen ; et al.	2008-04-10
Method For Fabricating And Beol Interconnect Structures With Simultaneous Formation Of High-k And Low-k Dielectric Regions App 20080079172 - Hsu; Louis Lu-Chen ; et al.	2008-04-03
Method for fabricating and BEOL interconnect structures with simultaneous formation of high-k and low-k dielectric regions Grant 7,348,280 - Hsu , et al. March 25, 2	2008-03-25
Systems and Methods for Controlling of Electro-Migration App 20080068038 - Cranford; Hayden Clavie JR. ; et al.	2008-03-20
Storage Elements with Disguised Configurations and Methods of Using the Same App 20080067600 - Hsu; Louis Lu-Chen ; et al.	2008-03-20
Storage Elements with Disguised Configurations and Methods of Using the Same App 20080067608 - Hsu; Louis Lu-Chen ; et al.	2008-03-20
Reduced-resistance Finfets By Sidewall Silicidation And Methods Of Manufacturing The Same App 20080054349 - Cheng; Kangguo ; et al.	2008-03-06
Design Structures Incorporating Interconnect Structures with Liner Repair Layers App 20080059924 - Hsu; Louis Lu-Chen ; et al.	2008-03-06
Dielectric Material With A Reduced Dielectric Constant And Methods Of Manufacturing The Same App 20080054487 - Hsu; Louis Lu-chen ; et al.	2008-03-06
Systems and methods for controlling of electro-migration Grant 7,339,390 - Cranford, Jr. , et al. March 4, 2	2008-03-04
Hybrid Oriented Substrates And Crystal Imprinting Methods For Forming Such Hybrid Oriented Substrates App 20080050890 - Hsu; Louis Lu-Chen ; et al.	2008-02-28
Semiconductor Finfet Structures With Encapsulated Gate Electrodes And Methods For Forming Such Semiconductor Finfet Structures App 20080048268 - Hsu; Louis Lu-Chen ; et al.	2008-02-28
Coplanar Silicon-on-insulator (soi) Regions Of Different Crystal Orientations And Methods Of Making The Same App 20080050891 - HSU; LOUIS LU-CHEN ; et al.	2008-02-28
Method for Reducing Defects in Buried Oxide Layers of Silicon on Insulator Substrates App 20080048259 - Cheng; Kangguo ; et al.	2008-02-28
Coplanar Silicon-on-insulator (soi) Regions Of Different Crystal Orientations And Methods Of Making The Same App 20080048286 - Hsu; Louis Lu-Chen ; et al.	2008-02-28
Design Structures Incorporating Semiconductor Device Structures with Self-Aligned Doped Regions App 20080048186 - Cheng; Kangguo ; et al.	2008-02-28
Method and apparatus for making coplanar isolated regions of different semiconductor materials on a substrate Grant 7,335,599 - Chen , et al. February 26, 2	2008-02-26
Body-contacted Semiconductor Structures And Methods Of Fabricating Such Body-contacted Semiconductor Structures App 20080044959 - Cheng; Kangguo ; et al.	2008-02-21
Design Structures Incorporating Semiconductor Device Structures with Reduced Junction Capacitance and Drain Induced Barrier Lowering App 20080034335 - Cheng; Kangguo ; et al.	2008-02-07
Hybrid Field Effect Transistor and Bipolar Junction Transistor Structures and Methods for Fabricating Such Structures App 20080001234 - Cheng; Kangguo ; et al.	2008-01-03
Semiconductor Device Structures for Bipolar Junction Transistors and Methods of Fabricating Such Structures App 20080003757 - Cheng; Kangguo ; et al.	2008-01-03
Structure And Method For Producing Multiple Size Interconnections App 20070290345 - Clevenger; Lawrence A. ; et al.	2007-12-20
Power network reconfiguration using MEM switches Grant 7,305,571 - Cranford, Jr. , et al. December 4, 2	2007-12-04
Universal Cmos Device Leakage Characterization System App 20070252613 - Hsu; Louis Lu-Chen ; et al.	2007-11-01
Method and structure to reduce contact resistance on thin silicon-on-insulator device App 20070254464 - Greene; Brian J. ; et al.	2007-11-01
Semiconductor Device Structures With Reduced Junction Capacitance And Drain Induced Barrier Lowering And Methods For Fabricating Such Device Structures And For Fabricating A Semiconductor-on-insulator Substrate App 20070246752 - Cheng; Kangguo ; et al.	2007-10-25
Semiconductor device structures with self-aligned doped regions and methods for forming such semiconductor device structures App 20070235833 - Cheng; Kangguo ; et al.	2007-10-11
Electrically programmable fuse structures with terminal portions residing at different heights, and methods of fabrication thereof App 20070210411 - Hovis; William P. ; et al.	2007-09-13
Electronic fuse with conformal fuse element formed over a freestanding dielectric spacer App 20070210890 - Hsu; Louis Lu-Chen ; et al.	2007-09-13
Differential amplifier offset voltage minimization independently from common mode voltage adjustment Grant 7,268,624 - Chen , et al. September 11, 2	2007-09-11
Programmable anti-fuse structures, methods for fabricating programmable anti-fuse structures, and methods of programming anti-fuse structures App 20070205485 - Hsu; Louis Lu-Chen ; et al.	2007-09-06
Methods and apparatus for testing an integrated circuit Grant 7,265,696 - Hsu , et al. September 4, 2	2007-09-04
Dielectric material with reduced dielectric constant and methods of manufacturing the same App 20070194405 - Hsu; Louis Lu-Chen ; et al.	2007-08-23
PFETS and methods of manufacturing the same App 20070166890 - Cheng; Kangguo ; et al.	2007-07-19
Reduced-resistance finFETs and methods of manufacturing the same App 20070148836 - Cheng; Kangguo ; et al.	2007-06-28
Method and apparatus for implementing enhanced hand shake protocol in microelectronic comunication systems App 20070111699 - Hsu; Louis Lu-Chen ; et al.	2007-05-17
Systems and Methods for Controlling of Electro-Migration App 20070103173 - Cranford; Hayden Clavie JR. ; et al.	2007-05-10
Methods and apparatus for testing an integrated circuit App 20070103350 - Hsu; Louis Lu-Chen ; et al.	2007-05-10
eFuse and methods of manufacturing the same App 20070099326 - Hsu; Louis Lu-Chen ; et al.	2007-05-03
Method for fabricating and BEOL interconnect structures with simultaneous formation of high-k and low-k dielectric regions App 20070096319 - Hsu; Louis Lu-Chen ; et al.	2007-05-03
Method and apparatus for making coplanar isolated regions of different semiconductor materials on a substrate App 20070087525 - Chen; Howard Hao ; et al.	2007-04-19
Semiconductor FinFET structures with encapsulated gate electrodes and methods for forming such semiconductor FinFET structures App 20070057325 - Hsu; Louis Lu-Chen ; et al.	2007-03-15
Ferromagnetic memory cell and methods of making and using the same App 20070045686 - Cheng; Kangguo ; et al.	2007-03-01
Method and apparatus for making coplanar dielectrically-isolated regions of different semiconductor materials on a substrate App 20070048975 - Chen; Howard Hao ; et al.	2007-03-01
Body-contacted semiconductor structures and methods of fabricating such body-contacted semiconductor structures App 20070045697 - Cheng; Kangguo ; et al.	2007-03-01
Differential amplifier offset voltage minimization independently from common mode voltage adjustment App 20070035342 - Chen; Minhan ; et al.	2007-02-15
Hybrid oriented substrates and crystal imprinting methods for forming such hybrid oriented substrates App 20060284250 - Hsu; Louis Lu-Chen ; et al.	2006-12-21
Crystal imprinting methods for fabricating subsrates with thin active silicon layers App 20060286781 - Hsu; Louis Lu-Chen ; et al.	2006-12-21
Patterned Silicon-on-Insulator layers and methods for forming the same App 20060286779 - Booth; Roger Allen JR. ; et al.	2006-12-21
Coplanar silicon-on-insulator (SOI) regions of different crystal orientations and methods of making the same App 20060284251 - Hsu; Louis Lu-Chen ; et al.	2006-12-21
Systems and methods for controlling of electro-migration App 20060267616 - Cranford; Hayden Clavie JR. ; et al.	2006-11-30
Reference current generation system Grant 7,132,821 - Camara , et al. November 7, 2	2006-11-07
Device and method for fabricating double-sided SOI wafer scale package with through via connections Grant 7,098,070 - Chen , et al. August 29, 2	2006-08-29
Circuits and methods for matching device characteristics for analog and mixed-signal designs Grant 7,086,020 - Chen , et al. August 1, 2	2006-08-01
Electronic component value trimming systems Grant 7,081,842 - Cranford, Jr. , et al. July 25, 2	2006-07-25
On-chip Cooling App 20060145356 - Liu; Hsichang ; et al.	2006-07-06
Device and method for fabricating double-sided SOI wafer scale package with optical through via connections App 20060113598 - Chen; Howard Hao ; et al.	2006-06-01
Device and method for fabricating double-sided SOI wafer scale package with through via connections App 20060105496 - Chen; Howard Hao ; et al.	2006-05-18
Power network reconfiguration using MEM switches App 20060056128 - Cranford; Hayden C. JR. ; et al.	2006-03-16
N-channel metal oxide semiconductor (NMOS) driver circuit and method of making same Grant 6,964,892 - Clevenger , et al. November 15, 2	2005-11-15
Reference current generation system App 20050179486 - Camara, Hibourahima ; et al.	2005-08-18
Electronic component value trimming systems App 20050127978 - Cranford, Hayden Clavie JR. ; et al.	2005-06-16
Circuits and methods for matching device characteristics for analog and mixed-signal designs App 20050132314 - Chen, Howard Hao ; et al.	2005-06-16
Partial inter-locking metal contact structure for semiconductor devices and method of manufacture App 20050112957 - Yang, Chih-Chao ; et al.	2005-05-26
Reference current generation system and method Grant 6,891,357 - Camara , et al. May 10, 2	2005-05-10
Semiconductor structure having in-situ formed unit resistors and method for fabrication Grant 6,831,369 - Cabral, Jr. , et al. December 14, 2	2004-12-14
Semiconductor structure having in-situ formed unit resistors and method for fabrication Grant 6,828,232 - Cabral, Jr. , et al. December 7, 2	2004-12-07
Hierarchical power supply noise monitoring device and system for very large scale integrated circuits Grant 6,823,293 - Chen , et al. November 23, 2	2004-11-23
Reference Current Generation System And Method App 20040207379 - Camara, Hibourahima ; et al.	2004-10-21
Semiconductor device incorporating elements formed of refractory metal-silicon-nitrogen and method for fabrication Grant 6,794,226 - Cabral, Jr. , et al. September 21, 2	2004-09-21
Hierarchical power supply noise monitoring device and system for very large scale integrated circuits App 20040128115 - Chen, Howard H. ; et al.	2004-07-01
Semiconductor structure having in-situ formed unit resistors and method for fabrication App 20040104438 - Cabral, Cyril JR. ; et al.	2004-06-03
Semiconductor structure having in-situ formed unit resistors and method for fabrication App 20040094843 - Cabral, Cyril JR. ; et al.	2004-05-20
Dynamic random access memory (DRAM) cell with folded bitline vertical transistor and method of producing the same Grant 6,720,602 - Clevenger , et al. April 13, 2	2004-04-13
Variable resistor structure and method for forming and programming a variable resistor for electronic circuits Grant 6,700,161 - Hsu , et al. March 2, 2	2004-03-02
Semiconductor structure having in-situ formed unit resistors Grant 6,700,203 - Cabral, Jr. , et al. March 2, 2	2004-03-02
Column redundancy system and method for a micro-cell embedded DRAM (e-DRAM) architecture Grant 6,674,676 - Hsu , et al. January 6, 2	2004-01-06
Column redundancy system and method for a micro-cell embedded DRAM (e-DRAM) architecture Grant 6,674,673 - Hsu , et al. January 6, 2	2004-01-06
Variable resistor structure and method for forming and programming a variable resistor for electronic circuits App 20030213998 - Hsu, Louis Lu-Chen ; et al.	2003-11-20
Self-trimming method on looped patterns Grant 6,632,741 - Clevenger , et al. October 14, 2	2003-10-14
Semiconductor device incorporating elements formed of refractory metal-silicon-nitrogen and method for fabrication App 20030151116 - Cabral, Cyril JR. ; et al.	2003-08-14
Low-power static column redundancy scheme for semiconductor memories Grant 6,603,690 - Chen , et al. August 5, 2	2003-08-05
Semiconductor device incorporating elements formed of refractory metal-silicon-nitrogen and method for fabrication Grant 6,545,339 - Cabral, Jr. , et al. April 8, 2	2003-04-08
Fuse and anti-fuse concept using a focused ion beam writing technique App 20030042431 - Clevenger, Lawrence A. ; et al.	2003-03-06
Semiconductor integrated circuits Grant 6,512,275 - Hsu , et al. January 28, 2	2003-01-28
Enhanced bitline equalization for hierarchical bitline architecture Grant 6,504,777 - Hsu , et al. January 7, 2	2003-01-07
Dual gate FET and process Grant 6,504,173 - Hsu , et al. January 7, 2	2003-01-07
N-channel metal oxide semiconductor (NMOS) driver circuit and method of making same App 20020149063 - Clevenger, Lawrence A. ; et al.	2002-10-17
Semiconductor device incorporating elements formed of refractory metal-silicon-nitrogen and method for fabrication App 20020130367 - Cabral, Cyril JR. ; et al.	2002-09-19
Method for fabricating ultra high-resistive conductors in semiconductor devices and devices fabricated App 20020125986 - Cabral, Cyril JR. ; et al.	2002-09-12
Dynamic random access memory (DRAM) cell with a folded bitline vertical transistor and method of producing the same App 20020102778 - Clevenger, Lawrence A. ; et al.	2002-08-01
Mixed memory integration with NVRAM, dram and sram cell structures on same substrate Grant 6,424,011 - Assaderaghi , et al. July 23, 2	2002-07-23
N-channel Metal Oxide Semiconductor (nmos) Driver Circuit And Method Of Making Same App 20020089020 - Clevenger, Lawrence A. ; et al.	2002-07-11
Method of producing dynamic random access memory (DRAM) cell with folded bitline vertical transistor Grant 6,399,447 - Clevenger , et al. June 4, 2	2002-06-04
Super low-power generator system for embedded applications Grant 6,343,044 - Hsu , et al. January 29, 2	2002-01-29
Semi-sacrificial diamond for air dielectric formation App 20010014526 - Clevenger, Lawrence A. ; et al.	2001-08-16
Low cost mixed memory integration with FERAM Grant 6,259,126 - Hsu , et al. July 10, 2	2001-07-10
Dual gate fet and process App 20010001486 - Hsu, Louis Lu-Chen ; et al.	2001-05-24
Process for forming a memory structure that includes NVRAM, DRAM, and/or SRAM memory structures on one substrate and process for forming a new NVRAM cell structure Grant 6,232,173 - Hsu , et al. May 15, 2	2001-05-15
Transistor having substantially isolated body and method of making the same Grant 6,177,299 - Hsu , et al. January 23, 2	2001-01-23
Defect management engine for semiconductor memories and memory systems Grant 6,141,267 - Kirihata , et al. October 31, 2	2000-10-31
Low cost mixed memory integration with substantially coplanar gate surfaces Grant 6,141,242 - Hsu , et al. October 31, 2	2000-10-31
Silicon-on-insulator structure for electrostatic discharge protection and improved heat dissipation Grant 6,121,661 - Assaderaghi , et al. September 19, 2	2000-09-19
Flash EEPROM Grant 6,107,141 - Hsu , et al. August 22, 2	2000-08-22
DRAM cell with transfer device extending along perimeter of trench storage capacitor Grant 6,037,620 - Hoenigschmid , et al. March 14, 2	2000-03-14
Low voltage active body semiconductor device Grant 5,998,847 - Assaderaghi , et al. December 7, 1	1999-12-07
SOI transistor having a self-aligned body contact Grant 5,962,895 - Beyer , et al. October 5, 1	1999-10-05
Structure for low cost mixed memory integration, new NVRAM structure, and process for forming the mixed memory and NVRAM structure Grant 5,880,991 - Hsu , et al. March 9, 1	1999-03-09
Modular MOSFETS for high aspect ratio applications Grant 5,874,764 - Hsieh , et al. February 23, 1	1999-02-23
Ramp-up rate control circuit for flash memory charge pump Grant 5,872,733 - Buti , et al. February 16, 1	1999-02-16
Silicon-on-insulator body-coupled gated diode for electrostatic discharge (ESD) and analog applications Grant 5,811,857 - Assaderaghi , et al. September 22, 1	1998-09-22
Vertical double-gate field effect transistor Grant 5,780,327 - Chu , et al. July 14, 1	1998-07-14
Discharge circuit in a semiconductor memory Grant 5,736,891 - Buti , et al. April 7, 1	1998-04-07
SOI transistor having a self-aligned body contact Grant 5,729,039 - Beyer , et al. March 17, 1	1998-03-17
Vertical double-gate field effect transistor Grant 5,689,127 - Chu , et al. November 18, 1	1997-11-18
Packing density for flash memories by using a pad oxide Grant 5,643,813 - Acocella , et al. July 1, 1	1997-07-01
Packing density for flash memories Grant 5,622,881 - Acocella , et al. April 22, 1	1997-04-22
Method for forming capacitors with roughened single crystal plates Grant 5,384,152 - Chu , et al. January 24, 1	1995-01-24