Hsu; Fei-Sheng

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hsu; Fei-Sheng.The latest application filed is for "computer-aided design system to automate scan synthesis at register-transfer level".

Company Profile

0.8.8

Hsu; Fei-Sheng - Hsinchu N/A TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Computer-aided design system to automate scan synthesis at register-transfer level Grant 8,543,950 - Wang , et al. September 24, 2	2013-09-24
Computer-aided Design System To Automate Scan Synthesis At Register-transfer Level App 20120246604 - WANG; Laung-Terng (L. -T.) ; et al.	2012-09-27
Event-driven emulation system Grant 7,970,597 - Lin , et al. June 28, 2	2011-06-28
Multiple-capture DFT system for scan-based integrated circuits Grant 7,904,773 - Wang , et al. March 8, 2	2011-03-08
Event-driven Emulation System App 20090287468 - Lin; Meng-Chyi ; et al.	2009-11-19
Method and apparatus for shifting at-speed scan patterns in a scan-based integrated circuit Grant 7,512,851 - Wang , et al. March 31, 2	2009-03-31
Multiple-Capture DFT system for scan-based integrated circuits App 20090070646 - Wang; Laung-Terng (L.T.) ; et al.	2009-03-12
Computer-aided design system to automate scan synthesis at register-transfer level Grant 7,331,032 - Wang , et al. February 12, 2	2008-02-12
Multiple-capture DFT system for scan-based integrated circuits App 20050235186 - Wang, Laung-Terng ; et al.	2005-10-20
Computer-aided design system to automate scan synthesis at register-transfer level Grant 6,957,403 - Wang , et al. October 18, 2	2005-10-18
Multiple-capture DFT system for scan-based integrated circuits Grant 6,954,887 - Wang , et al. October 11, 2	2005-10-11
Method and apparatus for shifting at-speed scan patterns in a scan-based integrated circuit App 20050055617 - Wang, Laung-Terng ; et al.	2005-03-10
Method and apparatus for testing asynchronous set/reset faults in a scan-based integrated circuit App 20040153926 - Abdel-Hafez, Khader S. ; et al.	2004-08-05
Computer-aided design system to automate scan synthesis at register-transfer level App 20030023941 - Wang, Laung-Terng (L.-T.) ; et al.	2003-01-30
Multiple-capture DFT system for scan-based integrated circuits App 20020184560 - Wang, Laung-Terng ; et al.	2002-12-05

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