Hsiung; Chiung-Sheng

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hsiung; Chiung-Sheng.The latest application filed is for "electroless niwp adhesion and capping layers for tft copper gate process".

Company Profile

0.6.12

Hsiung; Chiung-Sheng - Hsinchu TW
Hsiung; Chiung-Sheng - Hsin-Chu TW
Hsiung; Chiung-Sheng - Kaohsiung TW
Hsiung, Chiung-Sheng - Hsin-Chu City TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Electroless Niwp Adhesion and Capping Layers for Tft Copper Gate Process App 20090004372 - Nasu; Akinobu ; et al.	2009-01-01
Interconnection structure and fabrication method thereof Grant 7,179,732 - Hsiung , et al. February 20, 2	2007-02-20
Interconnection structure and fabrication method thereof Grant 6,890,851 - Hsiung , et al. May 10, 2	2005-05-10
Interconnection structure and fabrication method thereof App 20050001321 - Hsiung, Chiung-Sheng ; et al.	2005-01-06
Interconnection structure and fabrication method thereof App 20040241978 - Hsiung, Chiung-Sheng ; et al.	2004-12-02
Method for eliminating via resistance shift in organic ILD Grant 6,806,182 - Restaino , et al. October 19, 2	2004-10-19
Process for forming fusible links Grant 6,750,129 - Yang , et al. June 15, 2	2004-06-15
Interconnect structure and method for manufacturing the same App 20040105968 - Yeh, Ming-Shi ; et al.	2004-06-03
Interconnect structure and method for manufacturing the same App 20040106273 - Yeh, Ming-Shi ; et al.	2004-06-03
Process For Forming Fusible Links App 20040092091 - Yang, Gwo-Shii ; et al.	2004-05-13
Method for eliminating VIA resistance shift in organic ILD App 20030207559 - Restaino, Darryl ; et al.	2003-11-06
Method of forming metal fuse and bonding pad Grant 6,617,234 - Wang , et al. September 9, 2	2003-09-09
Damascene process in intergrated circuit fabrication App 20020182857 - Liu, Chih-Chien ; et al.	2002-12-05
Method for forming interconnect structure with low dielectric constant App 20020155263 - Wang, Sung-Hsiung ; et al.	2002-10-24
Method of forming metal fuse App 20020155672 - Wang, Sung-Hsiung ; et al.	2002-10-24
Method for forming interconnect structure with low dielectric constant App 20020155261 - Wang, Sung-Hsiung ; et al.	2002-10-24
Enhance Performance Of Copper Damascene Process By Embedding Conformal Tin Layer App 20020045345 - HSIUNG, CHIUNG-SHENG ; et al.	2002-04-18
Copper damascene technology for ultra large scale integration circuits Grant 6,174,812 - Hsiung , et al. January 16, 2	2001-01-16

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