Hsin; Pin-Yi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hsin; Pin-Yi.The latest application filed is for "integrated chip die carrier exchanger".

Company Profile

4.7.6

Hsin; Pin-Yi - Hsinchu County TW
Hsin; Pin-Yi - Jhubei City TW
Hsin; Pin-Yi - Jhubei TW
Hsin; Pin-Yi - Hsin Chu TW
Hsin, Pin-Yi - Chui-Bei City TW
Hsin; Pin-Yi - Chu-Pei TW
Hsin; Pin-Yi - Chu-Bet TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor packaged wafer and method for forming the same Grant 10,861,761 - Chang , et al. December 8, 2	2020-12-08
Integrated Chip Die Carrier Exchanger App 20200251367 - Kind Code	2020-08-06
Integrated chip die carrier exchanger Grant 10,665,489 - Lee , et al.	2020-05-26
Semiconductor Packaged Wafer And Method For Forming The Same App 20190103389 - CHANG; FU-CHEN ; et al.	2019-04-04
Integrated Chip Die Carrier Exchanger App 20170372932 - Lee; Chien-Fa ; et al.	2017-12-28
Method to improve etching of resist protective oxide (RPO) to prevent photo-resist peeling Grant 7,015,089 - Hsu , et al. March 21, 2	2006-03-21
Method to control spacer width Grant 7,001,784 - Hsu , et al. February 21, 2	2006-02-21
Novel process for improved hot carrier injection App 20050136664 - Chien, Tsai-Yuan ; et al.	2005-06-23
Deep UV-resistant photoresist plug for via hole Grant 6,833,233 - Cheng , et al. December 21, 2	2004-12-21
Method to improve etching of resist protective oxide (RPO) to prevent photo-resist peeling App 20040092070 - Hsu, Jyh-Shiou ; et al.	2004-05-13
Deep UV-resistant photoresist plug for via hole App 20030201543 - Cheng, Chung-Hsiu ; et al.	2003-10-30
Plasma etching method to form dual damascene with improved via profile Grant 6,569,777 - Hsu , et al. May 27, 2	2003-05-27
Prevention of defects formed in photoresist during wet etching Grant 6,498,106 - Hsin , et al. December 24, 2	2002-12-24

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