Hsieh; Yi-Bin

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hsieh; Yi-Bin.The latest application filed is for "charge pump circuit".

Company Profile

0.14.13

Hsieh; Yi-Bin - New Taipei N/A TW
Hsieh; Yi Bin - Hsinchu County N/A TW
Hsieh; Yi-Bin - Taipei County TW
Hsieh; Yi-Bin - Taipei Hsien TW
Hsieh; Yi-Bin - Taipei TW
Hsieh, Yi-Bin - Hsing-Tien City TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Electronic apparatus and clock generating method thereof Grant 8,531,216 - Wu , et al. September 10, 2	2013-09-10
Charge pump circuit Grant 8,502,576 - Hsieh August 6, 2	2013-08-06
Charge Pump Circuit App 20120280744 - HSIEH; Yi Bin	2012-11-08
Operational amplifier having DC offset cancellation capability Grant 7,999,612 - Hsieh August 16, 2	2011-08-16
Comparator for a pipelined analog-to-digital converter and related signal sampling method Grant 7,903,017 - Hsieh , et al. March 8, 2	2011-03-08
Operational Amplifier Having Dc Offset Cancellation Capability App 20110018633 - Hsieh; Yi-Bin	2011-01-27
Comparator For A Pipelined Analog-to-digital Converter And Related Signal Sampling Method App 20110012765 - Hsieh; Yi-Bin ; et al.	2011-01-20
Voltage control circuits Grant 7,683,599 - Chen , et al. March 23, 2	2010-03-23
Automatic-gain control circuit Grant 7,567,127 - Hsieh , et al. July 28, 2	2009-07-28
Signal processing circuit for optical disc drivers and the related method Grant 7,532,560 - Lin , et al. May 12, 2	2009-05-12
Voltage control circuits App 20080143306 - Chen; Hisn-Kuang ; et al.	2008-06-19
Automatic-gain Control Circuit App 20080068087 - Hsieh; Yi-Bin ; et al.	2008-03-20
Dual mode sample and hold circuit and cyclic pipeline analog to digital converter using the same Grant 7,333,039 - Lu , et al. February 19, 2	2008-02-19
Dual Mode Sample And Hold Circuit And Cyclic Pipeline Analog To Digital Converter Using The Same App 20070090984 - Lu; Wu-Hung ; et al.	2007-04-26
Transconductance filter circuit Grant 7,113,029 - Hsieh , et al. September 26, 2	2006-09-26
Clock recovery circuit and related methods Grant 7,016,450 - Lin , et al. March 21, 2	2006-03-21
Transconductance filter circuit App 20060006931 - Hsieh; Yi-Bin ; et al.	2006-01-12
Phase locked loop circuit App 20050280453 - Hsieh, Yi-Bin	2005-12-22
Duty cycle correction method for frequency synthesis Grant 6,927,642 - Hsieh August 9, 2	2005-08-09
Signal Processing Circuit For Optical Disc Drivers And The Related Method App 20050157626 - Lin, Jyh-Fong ; et al.	2005-07-21
Duty cycle correction method for frequency synthesis App 20040178837 - Hsieh, Yi-Bin	2004-09-16
Duty cycle correction circuit for use with frequency synthesizer Grant 6,737,927 - Hsieh May 18, 2	2004-05-18
Duty cycle correction circuit for use with frequency synthesizer App 20030102926 - Hsieh, Yi-Bin	2003-06-05
Signal processing circuit for optical disc drivers and the related method App 20030076771 - Lin, Jyh-Fong ; et al.	2003-04-24
Clock and data recovery circuit and related methods App 20030057928 - Lin, Jyh-Fong ; et al.	2003-03-27

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