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Semiconductor Structures Having Wells With Protruding Sections For Pickup Cells
App 20220310583 - Chang; Yung Feng ; et al. | 2022-09-29 |
Capacitor In Nanosheet
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Mitigation of time dependent dielectric breakdown
Grant 11,398,559 - Huang , et al. July 26, 2 | 2022-07-26 |
Semiconductor device and method
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Cell layout and structure
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Esd Structure And Semiconductor Structure
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Tap Cell, Integrated Circuit Structure And Forming Method Thereof
App 20210366895 - Chang; Yung-Feng ; et al. | 2021-11-25 |
FinFET having a relaxation prevention anchor and related methods
Grant 11,177,382 - Wang , et al. November 16, 2 | 2021-11-16 |
Integrated Circuit Having Angled Conductive Feature
App 20210280572 - HSIEH; Tung-Heng ; et al. | 2021-09-09 |
Leakage Reduction Between Two Transistor Devices On A Same Continuous Fin
App 20210264090 - Lin; Chun-Yen ; et al. | 2021-08-26 |
Dummy Poly Layout For High Density Devices
App 20210257351 - Chang; Yung Feng ; et al. | 2021-08-19 |
Semiconductor Device Having Fins and An Isolation Region
App 20210249409 - Fan; Chia-Sheng ; et al. | 2021-08-12 |
Semiconductor device including a conductive feature over an active region
Grant 11,075,164 - Hsieh , et al. July 27, 2 | 2021-07-27 |
Semiconductor Device And A Method For Fabricating The Same
App 20210226023 - HUANG; Yi-Jyun ; et al. | 2021-07-22 |
Integrated Circuit Layouts with Line-End Extensions
App 20210192121 - Liao; Hsien-Huang ; et al. | 2021-06-24 |
Metal gate structure and methods thereof
Grant 11,043,572 - Lee , et al. June 22, 2 | 2021-06-22 |
Semiconductor device including a conductive feature over an active region
Grant 11,031,334 - Hsieh , et al. June 8, 2 | 2021-06-08 |
Semiconductor Device and Method
App 20210166977 - Wu; Shih-Chieh ; et al. | 2021-06-03 |
Integrated circuit having angled conductive feature
Grant 11,024,622 - Hsieh , et al. June 1, 2 | 2021-06-01 |
System and method of fabricating ESD FinFET with improved metal landing in the drain
Grant 11,004,842 - Lee , et al. May 11, 2 | 2021-05-11 |
Conductive line patterning
Grant 10,998,304 - Liu , et al. May 4, 2 | 2021-05-04 |
Semiconductor device having fins and an isolation region
Grant 10,991,691 - Fan , et al. April 27, 2 | 2021-04-27 |
Semiconductor device including FinFET with self-align contact
Grant 10,971,588 - Huang , et al. April 6, 2 | 2021-04-06 |
Via Rail Structure
App 20210098369 - Kuang; Hao ; et al. | 2021-04-01 |
Semiconductor device and method
Grant 10,957,604 - Wu , et al. March 23, 2 | 2021-03-23 |
Leakage Reduction Methods And Structures Thereof
App 20210082769 - FAN; Chia-Sheng ; et al. | 2021-03-18 |
Method and IC Design with Non-Linear Power Rails
App 20210082755 - Wang; Sheng-Hsiung ; et al. | 2021-03-18 |
Integrated circuit layouts with line-end extensions
Grant 10,943,054 - Liao , et al. March 9, 2 | 2021-03-09 |
Leakage reduction between two transistor devices on a same continuous fin
Grant 10,867,101 - Lin , et al. December 15, 2 | 2020-12-15 |
Method and IC design with non-linear power rails
Grant 10,854,512 - Wang , et al. December 1, 2 | 2020-12-01 |
Leakage reduction methods and structures thereof
Grant 10,832,958 - Fan , et al. November 10, 2 | 2020-11-10 |
Integrated circuit layouts with line-end extensions
Grant 10,803,227 - Liao , et al. October 13, 2 | 2020-10-13 |
Cell Layout and Structure
App 20200257842 - Hsieh; Tung-Heng ; et al. | 2020-08-13 |
Mitigation Of Time Dependent Dielectric Breakdown
App 20200243663 - Huang; Yi-Jyun ; et al. | 2020-07-30 |
Methods and apparatus for MOS capacitors in replacement gate process
Grant 10,720,361 - Wang , et al. | 2020-07-21 |
Cell layout and structure
Grant 10,664,639 - Hsieh , et al. | 2020-05-26 |
Mitigation of time dependent dielectric breakdown
Grant 10,658,486 - Huang , et al. | 2020-05-19 |
Metal Gate Structure And Methods Thereof
App 20200152757 - LEE; Tzung-Chi ; et al. | 2020-05-14 |
Method and IC Design with Non-Linear Power Rails
App 20200144115 - Wang; Sheng-Hsiung ; et al. | 2020-05-07 |
Semiconductor Device and Method
App 20200135579 - Wu; Shih-Chieh ; et al. | 2020-04-30 |
Finfet Having A Relaxation Prevention Anchor And Related Methods
App 20200135924 - WANG; Sheng-Hsiung ; et al. | 2020-04-30 |
Semiconductor Device Having Fins
App 20200135726 - Fan; Chia-Sheng ; et al. | 2020-04-30 |
Integrated Circuit Having Angled Conductive Feature
App 20200126966 - HSIEH; Tung-Heng ; et al. | 2020-04-23 |
Integrated Circuit Layouts with Line-End Extensions
App 20200082055 - Liao; Hsien-Huang ; et al. | 2020-03-12 |
Semiconductor Device including a Conductive Feature Over an Active Region
App 20200075476 - Hsieh; Tung-Heng ; et al. | 2020-03-05 |
System and Method of Fabricating ESD FinFET With Improved Metal landing in the Drain
App 20200051972 - Lee; Tzung-Chi ; et al. | 2020-02-13 |
Semiconductor Device And A Method For Fabricating The Same
App 20200044038 - HUANG; Yi-Jyun ; et al. | 2020-02-06 |
Metal gate structure and methods thereof
Grant 10,535,746 - Lee , et al. Ja | 2020-01-14 |
Semiconductor Device Including a Conductive Feature Over an Active Region
App 20200006217 - Hsieh; Tung-Heng ; et al. | 2020-01-02 |
System and method of processing cutting layout and example switching circuit
Grant 10,522,527 - Hsieh , et al. Dec | 2019-12-31 |
Method of forming a FinFET having a relaxation prevention anchor
Grant 10,522,681 - Wang , et al. Dec | 2019-12-31 |
Finfet with self-aligned source/drain
Grant 10,522,634 - Huang , et al. Dec | 2019-12-31 |
Method and IC design with non-linear power rails
Grant 10,515,850 - Wang , et al. Dec | 2019-12-24 |
Semiconductor device having fins
Grant 10,515,957 - Fan , et al. Dec | 2019-12-24 |
Semiconductor device including a conductive feature over an active region
Grant 10,504,837 - Hsieh , et al. Dec | 2019-12-10 |
Methods and Apparatus for MOS Capacitors in Replacement Gate Process
App 20190341310 - Wang; Pai-Chieh ; et al. | 2019-11-07 |
System and method of fabricating ESD finFET with improved metal landing in the drain
Grant 10,453,837 - Lee , et al. Oc | 2019-10-22 |
Leakage Reduction Methods And Structures Thereof
App 20190259664 - FAN; Chia-Sheng ; et al. | 2019-08-22 |
System And Method Of Fabricating Esd Finfet With Improved Metal Landing In The Drain
App 20190252370 - Lee; Tzung-Chi ; et al. | 2019-08-15 |
Conductive Line Patterning
App 20190244950 - Liu; Ru-Gun ; et al. | 2019-08-08 |
Methods and apparatus for MOS capacitors in replacement gate process
Grant 10,354,920 - Wang , et al. July 16, 2 | 2019-07-16 |
Method for manufacturing semiconductor device with replacement gates
Grant 10,354,997 - Fan , et al. July 16, 2 | 2019-07-16 |
Method of manufacturing finFETs with self-align contacts
Grant 10,340,348 - Huang , et al. | 2019-07-02 |
Mask optimization for multi-layer contacts
Grant 10,283,495 - Liu , et al. | 2019-05-07 |
System and method of fabricating ESD FinFET with improved metal landing in the drain
Grant 10,276,559 - Lee , et al. | 2019-04-30 |
Leakage reduction methods and structures thereof
Grant 10,276,445 - Fan , et al. | 2019-04-30 |
FinFET having a relaxation prevention anchor
Grant 10,276,718 - Wang , et al. | 2019-04-30 |
Conductive line patterning
Grant 10,269,785 - Liu , et al. | 2019-04-23 |
Integrated Circuit Layouts with Line-End Extensions
App 20190065654 - Liao; Hsien-Huang ; et al. | 2019-02-28 |
Leakage Reduction Methods And Structures Thereof
App 20190067116 - FAN; Chia-Sheng ; et al. | 2019-02-28 |
Finfet Having A Relaxation Prevention Anchor
App 20190067479 - WANG; Sheng-Hsiung ; et al. | 2019-02-28 |
Method and IC Design with Non-Linear Power Rails
App 20190067097 - Wang; Sheng-Hsiung ; et al. | 2019-02-28 |
Method Of Forming A Finfet Having A Relaxation Prevention Anchor
App 20190067481 - WANG; Sheng-Hsiung ; et al. | 2019-02-28 |
Dummy fin cell placement in an integrated circuit layout
Grant 10,204,202 - Hsieh , et al. Feb | 2019-02-12 |
Semiconductor device and a method for fabricating the same
Grant 10,164,034 - Huang , et al. Dec | 2018-12-25 |
Semiconductor Device And A Method For Fabricating The Same
App 20180350928 - HUANG; Yi-Jyun ; et al. | 2018-12-06 |
Dummy fin cell placement in an integrated circuit layout
Grant 10,141,296 - Hsieh , et al. Nov | 2018-11-27 |
Mitigation Of Time Dependent Dielectric Breakdown
App 20180337053 - HUANG; Yi-Jyun ; et al. | 2018-11-22 |
Method for Manufacturing Semiconductor Device with Replacement Gates
App 20180337178 - Fan; Chia-Sheng ; et al. | 2018-11-22 |
Metal Gate Structure And Methods Thereof
App 20180331199 - LEE; Tzung-Chi ; et al. | 2018-11-15 |
Semiconductor Device And Method
App 20180315752 - Fan; Chia-Sheng ; et al. | 2018-11-01 |
Metal gate structure and methods thereof
Grant 10,079,289 - Lee , et al. September 18, 2 | 2018-09-18 |
Cell Layout and Structure
App 20180253522 - Hsieh; Tung-Heng ; et al. | 2018-09-06 |
Metal Gate Structure And Methods Thereof
App 20180182859 - LEE; Tzung-Chi ; et al. | 2018-06-28 |
Method and apparatus for integrated circuit layout
Grant 9,995,998 - Chen , et al. June 12, 2 | 2018-06-12 |
Semiconductor device, layout of semiconductor device, and method of manufacturing semiconductor device
Grant 9,991,158 - Hsieh , et al. June 5, 2 | 2018-06-05 |
Cell layout and structure
Grant 9,984,191 - Hsieh , et al. May 29, 2 | 2018-05-29 |
Dummy Fin Cell Placement In An Integrated Circuit Layout
App 20180137232 - HSIEH; Tung-Heng ; et al. | 2018-05-17 |
System And Method Of Fabricating Esd Finfet With Improved Metal Landing In The Drain
App 20180130792 - Lee; Tzung-Chi ; et al. | 2018-05-10 |
Method of forming layout design
Grant 9,899,263 - Hsieh , et al. February 20, 2 | 2018-02-20 |
System and method of fabricating ESD FinFET with improved metal landing in the drain
Grant 9,865,589 - Lee , et al. January 9, 2 | 2018-01-09 |
Dummy Fin Cell Placement In An Integrated Circuit Layout
App 20180004882 - HSIEH; Tung-Heng ; et al. | 2018-01-04 |
Semiconductor device and manufacturing method thereof
Grant 9,859,364 - Wang , et al. January 2, 2 | 2018-01-02 |
Integrated circuit with elongated coupling
Grant 9,806,071 - Hsieh , et al. October 31, 2 | 2017-10-31 |
Semiconductor Device And A Method For Fabricating The Same
App 20170309715 - HUANG; Yi-Jyun ; et al. | 2017-10-26 |
Semiconductor device and a method for fabricating the same
Grant 9,773,879 - Huang , et al. September 26, 2 | 2017-09-26 |
Jog design in integrated circuits
Grant 9,691,721 - Wu , et al. June 27, 2 | 2017-06-27 |
Semiconductor Device And A Method For Fabricating The Same
App 20170154966 - HUANG; Yi-Jyun ; et al. | 2017-06-01 |
Semiconductor Device And A Method For Fabricating The Same
App 20170154967 - HUANG; Yi-Jyun ; et al. | 2017-06-01 |
Conductive Line Patterning
App 20170025401 - Liu; Ru-Gun ; et al. | 2017-01-26 |
Method And Apparatus For Integrated Circuit Layout
App 20160370698 - Chen; Yi-Fan ; et al. | 2016-12-22 |
Integrated Circuit with Elongated Coupling
App 20160358902 - Hsieh; Tung-Heng ; et al. | 2016-12-08 |
Methods and Apparatus for MOS Capacitors in Replacement Gate Process
App 20160351451 - Wang; Pai-Chieh ; et al. | 2016-12-01 |
System And Method Of Processing Cutting Layout And Example Switching Circuit
App 20160351555 - HSIEH; Tung-Heng ; et al. | 2016-12-01 |
Semiconductor Device and Method of Manufacturing Semiconductor Device
App 20160343656 - Hsieh; Tung-Heng ; et al. | 2016-11-24 |
Conductive line patterning
Grant 9,472,501 - Liu , et al. October 18, 2 | 2016-10-18 |
Mask Optimization For Multi-Layer Contacts
App 20160293590 - Liu; Ru-Gun ; et al. | 2016-10-06 |
Jog Design in Integrated Circuits
App 20160276297 - Wu; Tsung-Lin ; et al. | 2016-09-22 |
Method of Forming Layout Design
App 20160254190 - Hsieh; Tung-Heng ; et al. | 2016-09-01 |
System and method of processing cutting layout and example switching circuit
Grant 9,431,381 - Hsieh , et al. August 30, 2 | 2016-08-30 |
Integrated circuit with elongated coupling
Grant 9,425,141 - Hsieh , et al. August 23, 2 | 2016-08-23 |
Semiconductor device and method of manufacturing semiconductor device
Grant 9,412,700 - Hsieh , et al. August 9, 2 | 2016-08-09 |
Mask optimization for multi-layer contacts
Grant 9,391,056 - Liu , et al. July 12, 2 | 2016-07-12 |
Method and apparatus for integrated circuit layout
Grant 9,377,680 - Chen , et al. June 28, 2 | 2016-06-28 |
Jog design in integrated circuits
Grant 9,355,912 - Wu , et al. May 31, 2 | 2016-05-31 |
Method of forming layout design
Grant 9,336,348 - Hsieh , et al. May 10, 2 | 2016-05-10 |
Semiconductor Device And Method Of Manufacturing Semiconductor Device
App 20160111370 - HSIEH; Tung-Heng ; et al. | 2016-04-21 |
Integrated Circuit With Elongated Coupling
App 20160104674 - HSIEH; Tung-Heng ; et al. | 2016-04-14 |
System And Method Of Processing Cutting Layout And Example Switching Circuit
App 20160093603 - HSIEH; Tung-Heng ; et al. | 2016-03-31 |
Semiconductor Device, Layout Of Semiconductor Device, And Method Of Manufacturing Semiconductor Device
App 20160079162 - HSIEH; Tung-Heng ; et al. | 2016-03-17 |
Method Of Forming Layout Design
App 20160078164 - HSIEH; Tung-Heng ; et al. | 2016-03-17 |
Cell Layout and Structure
App 20160063166 - Hsieh; Tung-Heng ; et al. | 2016-03-03 |
Methods and apparatus for hybrid MOS capacitors in replacement gate process
Grant 9,269,833 - Wang , et al. February 23, 2 | 2016-02-23 |
Conductive Line Patterning
App 20150333002 - Liu; Ru-Gun ; et al. | 2015-11-19 |
Conductive line patterning
Grant 9,136,168 - Liu , et al. September 15, 2 | 2015-09-15 |
Semiconductor devices, methods of manufacture thereof, and methods of forming resistors
Grant 9,111,768 - Lu , et al. August 18, 2 | 2015-08-18 |
Semiconductor device including polysilicon resistor and metal gate resistor and methods of fabricating thereof
Grant 9,070,624 - Chen , et al. June 30, 2 | 2015-06-30 |
Method and Apparatus for Integrated Circuit Layout
App 20150140478 - Chen; Yi-Fan ; et al. | 2015-05-21 |
Jog Design in Integrated Circuits
App 20150087143 - Wu; Tsung-Lin ; et al. | 2015-03-26 |
Mask Optimization for Multi-Layer Contacts
App 20150048457 - Liu; Ru-Gun ; et al. | 2015-02-19 |
Conductive Line Patterning
App 20150001734 - Liu; Ru-Gun ; et al. | 2015-01-01 |
Semiconductor Devices, Methods of Manufacture Thereof, and Methods of Forming Resistors
App 20150001678 - Lu; Chia-Yu ; et al. | 2015-01-01 |
Jog design in integrated circuits
Grant 8,901,627 - Wu , et al. December 2, 2 | 2014-12-02 |
Semiconductor devices, methods of manufacture thereof, and methods of forming resistors
Grant 8,859,386 - Lu , et al. October 14, 2 | 2014-10-14 |
Jog Design in Integrated Circuits
App 20140138750 - Wu; Tsung-Lin ; et al. | 2014-05-22 |
Semiconductor Devices, Methods of Manufacture Thereof, and Methods of Forming Resistors
App 20130328131 - Lu; Chia-Yu ; et al. | 2013-12-12 |
Semiconductor Device Including Polysilicon Resistor And Metal Gate Resistor And Methods Of Fabricating Thereof
App 20130157452 - Chen; Jian-Hao ; et al. | 2013-06-20 |
Methods and Apparatus for Hybrid MOS Capacitors in Replacement Gate Process
App 20130126955 - Wang; Pai-Chieh ; et al. | 2013-05-23 |
Methods and Apparatus for MOS Capacitors in Replacement Gate Process
App 20130126953 - Wang; Pai-Chieh ; et al. | 2013-05-23 |
Method of fabricating a field-effect transistor having robust sidewall spacers
Grant 7,897,501 - Cheng , et al. March 1, 2 | 2011-03-01 |
Method Of Fabricating Semiconductor Device
App 20080268602 - Cheng; Chien-Li ; et al. | 2008-10-30 |
Method for forming silicide and semiconductor device formed thereby
Grant 7,382,028 - Hsieh , et al. June 3, 2 | 2008-06-03 |
Silicided gates for CMOS devices
App 20070224808 - Chang; Tsung-Hsien ; et al. | 2007-09-27 |
Method for forming silicide and semiconductor device formed thereby
App 20060231910 - Hsieh; Tung-Heng ; et al. | 2006-10-19 |
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