Hsieh; Ping-Pang
Patent Applications and Registrations
Patent applications and USPTO patent grants for Hsieh; Ping-Pang.The latest application filed is for "polysilicon removal in word line contact region of memory devices".
Company Profile
5.21.25
- Hsieh; Ping-Pang - Tainan TW
- Hsieh; Ping-Pang - Tainan City TW
- Hsieh; Ping-Pang - Shanhua Township Tainan County TW
- Hsieh; Ping-Pang - Siaosinying TW
- Hsieh; Ping-Pang - Shaninua Township TW
- Hsieh; Ping-Pang - Tainan Hsien TW
Patent Activity
| Patent | Date |
|---|---|
| Methods for improving interlayer dielectric layer topography Grant 11,257,719 - Su , et al. February 22, 2 | 2022-02-22 |
| Polysilicon Removal In Word Line Contact Region Of Memory Devices App 20210408023 - WU; Y.J. ; et al. | 2021-12-30 |
| Floating Gate Isolation App 20210043774 - HSU; Shih-Lu ; et al. | 2021-02-11 |
| Floating gate isolation and method for manufacturing the same Grant 10,818,804 - Hsu , et al. October 27, 2 | 2020-10-27 |
| Methods for Improving Interlayer Dielectric Layer Topography App 20200294862 - Su; Kuan-Wei ; et al. | 2020-09-17 |
| Methods for improving interlayer dielectric layer topography Grant 10,699,960 - Su , et al. | 2020-06-30 |
| Formation of semiconductor device with resistors having different resistances Grant 10,629,593 - Chen , et al. | 2020-04-21 |
| Methods for Improving Interlayer Dielectric Layer Topography App 20200006152 - Su; Kuan-Wei ; et al. | 2020-01-02 |
| Apparatus and method for memory device Grant 10,164,073 - Hsieh , et al. Dec | 2018-12-25 |
| Method for forming semiconductor device structure Grant 10,141,401 - Hsu , et al. Nov | 2018-11-27 |
| Gate structure with multiple spacers Grant 10,103,235 - Pan , et al. October 16, 2 | 2018-10-16 |
| Method For Forming Semiconductor Device Structure App 20170263464 - HSU; Shih-Lu ; et al. | 2017-09-14 |
| Gate Structure With Multiple Spacers App 20170243946 - PAN; Chia-Ming ; et al. | 2017-08-24 |
| Silicide process using OD spacers Grant 9,711,657 - Hsieh , et al. July 18, 2 | 2017-07-18 |
| Semiconductor device structure and method for forming the same Grant 9,666,668 - Hsu , et al. May 30, 2 | 2017-05-30 |
| Gate structure with multiple spacer and method for manufacturing the same Grant 9,653,302 - Pan , et al. May 16, 2 | 2017-05-16 |
| Floating Gate Isolation And Method For Manufacturing The Same App 20170125602 - HSU; Shih-Lu ; et al. | 2017-05-04 |
| Semiconductor Device Structure And Method For Forming The Same App 20170117355 - HSU; Shih-Lu ; et al. | 2017-04-27 |
| Gate Structure With Multiple Spacer And Method For Manufacturing The Same App 20170032971 - PAN; Chia-Ming ; et al. | 2017-02-02 |
| Formation Of Semiconductor Device With Resistors App 20160233215 - CHEN; Yu-Jen ; et al. | 2016-08-11 |
| Memory device structure and method Grant 9,406,519 - Hsieh , et al. August 2, 2 | 2016-08-02 |
| Silicide Process Using OD Spacers App 20160163875 - Hsieh; Ping-Pang ; et al. | 2016-06-09 |
| Formation of semiconductor device with resistors Grant 9,349,785 - Chen , et al. May 24, 2 | 2016-05-24 |
| Silicide process using OD spacers Grant 9,263,556 - Hsieh , et al. February 16, 2 | 2016-02-16 |
| Method for forming a semiconductor device with void-free shallow trench isolation Grant 9,263,316 - Wu , et al. February 16, 2 | 2016-02-16 |
| Semiconductor Device With Shallow Trench Isolation App 20150228534 - Wu; Shang-Yen ; et al. | 2015-08-13 |
| Apparatus and Method for Memory Device App 20150221752 - Hsieh; Ping-Pang ; et al. | 2015-08-06 |
| Memory Device Structure and Method App 20150187587 - Hsieh; Ping-Pang ; et al. | 2015-07-02 |
| Formation Of Semiconductor Device With Resistors App 20150145099 - Chen; Yu-Jen ; et al. | 2015-05-28 |
| Memory device structure and method Grant 8,980,711 - Hsieh , et al. March 17, 2 | 2015-03-17 |
| Apparatus and Method for Memory Device App 20140015031 - Hsieh; Ping-Pang ; et al. | 2014-01-16 |
| Silicide Process Using OD Spacers App 20140001529 - Hsieh; Ping-Pang ; et al. | 2014-01-02 |
| Memory Device Structure and Method App 20130224943 - Hsieh; Ping-Pang ; et al. | 2013-08-29 |
| Method for fabricating semiconductor device Grant 7,638,400 - Hsieh December 29, 2 | 2009-12-29 |
| Method for controlling lattice defects at junction and method for forming LDD or S/D regions of CMOS device Grant 7,320,907 - Hsieh , et al. January 22, 2 | 2008-01-22 |
| Method For Fabricating Semiconductor Device App 20070099387 - Hsieh; Ping-Pang | 2007-05-03 |
| Method for fabricating semiconductor device Grant 7,157,343 - Hsieh January 2, 2 | 2007-01-02 |
| Method for fabricating semiconductor device Grant 7,126,189 - Hsieh October 24, 2 | 2006-10-24 |
| Method for controlling lattice defects at junction and method for forming LDD or S/D regions of CMOS device App 20060115969 - Hsieh; Ping-Pang ; et al. | 2006-06-01 |
| Method for fabricating semiconductor device App 20050227447 - Hsieh, Ping-Pang | 2005-10-13 |
| Method for fabricating semiconductor device App 20050205899 - Hsieh, Ping-Pang | 2005-09-22 |
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