Hsieh; Chung-Ying
Patent Applications and Registrations
Patent applications and USPTO patent grants for Hsieh; Chung-Ying.The latest application filed is for "method for buffering clock skew by using a logical effort".
- Hsieh; Chung-Ying - Hsinchu N/A TW
- Hsieh; Chung-Ying - Changhua TW
| Patent | Date |
|---|---|
| Method for buffering clock skew by using a logical effort Grant 8,487,684 - Hsieh , et al. July 16, 2 | 2013-07-16 |
| Programmable clock generator used in dynamic-voltage-and-frequency-scaling (DVFS) operated in sub- and near- threshold region Grant 8,237,477 - Hsieh , et al. August 7, 2 | 2012-08-07 |
| Method For Buffering Clock Skew By Using A Logical Effort App 20120169394 - Hsieh; Chung-Ying ; et al. | 2012-07-05 |
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