Hsia; Wei-Jen

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hsia; Wei-Jen.The latest application filed is for "copper-free semiconductor device interface and methods of fabrication and use thereof".

Company Profile

0.29.14

Hsia; Wei-Jen - Saratoga CA
Hsia; Wei-Jen - Sunnyvale CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Copper-free Semiconductor Device Interface And Methods Of Fabrication And Use Thereof App 20080308937 - Catabay; Wilbur ; et al.	2008-12-18
Dual layer barrier film techniques to prevent resist poisoning Grant 7,393,780 - Lu , et al. July 1, 2	2008-07-01
Incorporating dopants to enhance the dielectric properties of metal silicates Grant 7,312,127 - Lo , et al. December 25, 2	2007-12-25
Interconnect dielectric tuning Grant 7,259,462 - Lo , et al. August 21, 2	2007-08-21
Planarization with reduced dishing App 20070163993 - Catabay; Wilbur G. ; et al.	2007-07-19
Planarization with reduced dishing Grant 7,220,362 - Catabay , et al. May 22, 2	2007-05-22
Dual layer barrier film techniques to prevent resist poisoning App 20060205203 - Lu; Hong-Qiang ; et al.	2006-09-14
Incorporating dopants to enhance the dielectric properties of metal silicates App 20060166496 - Lo; Wai ; et al.	2006-07-27
Interconnect dielectric tuning Grant 7,081,406 - Lo , et al. July 25, 2	2006-07-25
Dual layer barrier film techniques to prevent resist poisoning Grant 7,071,094 - Lu , et al. July 4, 2	2006-07-04
Incorporating dopants to enhance the dielectric properties of metal silicates Grant 7,064,062 - Lo , et al. June 20, 2	2006-06-20
Planarization with reduced dishing App 20060118523 - Catabay; Wilbur G. ; et al.	2006-06-08
Planarization with reduced dishing Grant 7,029,591 - Catabay , et al. April 18, 2	2006-04-18
Interconnection capacitance reduction App 20060035457 - Carter; Richard J. ; et al.	2006-02-16
Interconnect dielectric tuning App 20060035455 - Lo; Wai ; et al.	2006-02-16
Plasma treatment of low dielectric constant dielectric material to form structures useful in formation of metal interconnects and/or filled vias for integrated circuit structure Grant 6,930,056 - Catabay , et al. August 16, 2	2005-08-16
Incorporating dopants to enhance the dielectric properties of metal silicates App 20050127458 - Lo, Wai ; et al.	2005-06-16
Process for planarizing upper surface of damascene wiring structure for integrated circuit structures Grant 6,881,664 - Catabay , et al. April 19, 2	2005-04-19
Dual layer barrier film techniques to prevent resist poisoning App 20040253784 - Lu, Hong-Qiang ; et al.	2004-12-16
Planarization with reduced dishing App 20040238492 - Catabay, Wilbur G. ; et al.	2004-12-02
Dual layer barrier film techniques to prevent resist poisoning Grant 6,812,134 - Lu , et al. November 2, 2	2004-11-02
Integrated circuit structure having low dielectric constant material and having silicon oxynitride caps over closely spaced apart metal lines Grant 6,794,756 - Li , et al. September 21, 2	2004-09-21
Plasma treatment of low dielectric constant dielectric material to form structures useful in formation of metal interconnects and/or filled vias for intergrated circuit structure Grant 6,790,784 - Catabay , et al. September 14, 2	2004-09-14
Method and structure for forming dielectric layers having reduced dielectric constants Grant 6,774,057 - Lu , et al. August 10, 2	2004-08-10
Low dielectric constant silicon oxide-based dielectric layer for integrated circuit structures having improved compatibility with via filler materials, and method of making same Grant 6,756,674 - Catabay , et al. June 29, 2	2004-06-29
Anti-reflective coatings for use at 248 nm and 193 nm Grant 6,686,272 - Lee , et al. February 3, 2	2004-02-03
Process for planarizing upper surface of damascene wiring structure for integrated circuit structures App 20040009668 - Catabay, Wilbur G. ; et al.	2004-01-15
Plasma treatment of low dielectric constant dielectric material to form structures useful in formation of metal interconnects and/or filled vias for intergrated circuit structure App 20030207594 - Catabay, Wilbur G. ; et al.	2003-11-06
Process for forming integrated circuit structure comprising layer of low k dielectric material having antireflective properties in an upper surface Grant 6,613,665 - Catabay , et al. September 2, 2	2003-09-02
Process for treating porous low k dielectric material in damascene structure to form a non-porous dielectric diffusion barrier on etched via and trench surfaces in the porous low k dielectric material Grant 6,537,896 - Catabay , et al. March 25, 2	2003-03-25
Process For Forming Composite Of Barrier Layers Of Dielectric Material To Inhibit Migration Of Copper From Copper Metal Interconnect Of Integrated Circuit Structure Into Adjacent Layer Of Low K Dielectric Material Grant 6,528,423 - Catabay , et al. March 4, 2	2003-03-04
Process for forming metal-filled openings in low dielectric constant dielectric material while inhibiting via poisoning Grant 6,503,840 - Catabay , et al. January 7, 2	2003-01-07
Composite low dielectric constant film for integrated circuit structure Grant 6,492,731 - Catabay , et al. December 10, 2	2002-12-10
Process for forming metal-filled openings in low dielectric constant dielectric material while inhibiting via poisoning App 20020164877 - Catabay, Wilbur G. ; et al.	2002-11-07
Integrated circuit structure having low dielectric constant material and having silicon oxynitride caps over closely spaced apart metal lines App 20020135040 - Li, Weidan ; et al.	2002-09-26
Process for forming low K dielectric material between metal lines Grant 6,423,630 - Catabay , et al. July 23, 2	2002-07-23
Method to obtain a low resistivity and conformity chemical vapor deposition titanium film Grant 6,297,555 - Zhao , et al. October 2, 2	2001-10-02
Process to prevent stress cracking of dielectric films on semiconductor wafers Grant 6,232,658 - Catabay , et al. May 15, 2	2001-05-15
Plasma cleaning process for openings formed in at least one low dielectric constant insulation layer over copper metallization in integrated circuit structures Grant 6,204,192 - Zhao , et al. March 20, 2	2001-03-20
Process for forming low k silicon oxide dielectric material while suppressing pressure spiking and inhibiting increase in dielectric constant Grant 6,147,012 - Sukharev , et al. November 14, 2	2000-11-14
Process for treating exposed surfaces of a low dielectric constant carbon doped silicon oxide dielectric material to protect the material from damage Grant 6,114,259 - Sukharev , et al. September 5, 2	2000-09-05
Method and composition for reducing gate oxide damage during RF sputter clean Grant 5,994,211 - Wang , et al. November 30, 1	1999-11-30
Method for the controlled formation of voids in doped glass dielectric films Grant 5,278,103 - Mallon , et al. January 11, 1	1994-01-11

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