Hsia; Liang-Choo

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hsia; Liang-Choo.The latest application filed is for "method for fabricating semiconductor memory device with buried capacitor and fin-like electrodes".

Company Profile

1.115.103

Hsia; Liang-Choo - Hsinchu City TW
Hsia; Liang-Choo - Hsinchu TW
HSIA; Liang Choo - Singapore SG
Hsia; Liang Choo - US
Hsia; Liang-Choo - Taipei TW
Hsia; Liang-Choo - Stormville NY
Hsia; Liang-Choo - Mastic Beach NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method For Fabricating Semiconductor Memory Device With Buried Capacitor And Fin-like Electrodes App 20220181328 - Chern; Geeng-Chuan ; et al.	2022-06-09
Stacked capacitor with horizontal and vertical fin structures and method for making the same Grant 11,322,500 - Chern , et al. May 3, 2	2022-05-03
Semiconductor memory device with buried capacitor and fin-like electrodes Grant 11,296,090 - Chern , et al. April 5, 2	2022-04-05
Stacked Capacitor With Horizontal And Vertical Fin Structures And Method For Making The Same App 20220037332 - Chern; Geeng-Chuan ; et al.	2022-02-03
Trench Capacitor Having Improved Capacitance And Fabrication Method Thereof App 20220020844 - Chern; Geeng-Chuan ; et al.	2022-01-20
Trench capacitor having improved capacitance and fabrication method thereof Grant 11,139,368 - Chern , et al. October 5, 2	2021-10-05
Semiconductor memory device with shallow buried capacitor and fabrication method thereof Grant 11,114,442 - Chern , et al. September 7, 2	2021-09-07
Semiconductor Memory Device With Shallow Buried Capacitor And Fabrication Method Thereof App 20210183867 - Chern; Geeng-Chuan ; et al.	2021-06-17
Semiconductor Memory Device With Buried Capacitor And Fin-like Electrodes, And Fabrication Method Thereof App 20210183868 - Chern; Geeng-Chuan ; et al.	2021-06-17
Trench Capacitor Having Improved Capacitance And Fabrication Method Thereof App 20210098566 - Chern; Geeng-Chuan ; et al.	2021-04-01
Slot Designs In Wide Metal Lines App 20160233157 - LIM; Yeow Kheng ; et al.	2016-08-11
Slot designs in wide metal lines Grant 9,318,378 - Lim , et al. April 19, 2	2016-04-19
Reliable interconnect for semiconductor device Grant 9,054,107 - Zhang , et al. June 9, 2	2015-06-09
Method and apparatus to reduce thermal variations within an integrated circuit die using thermal proximity correction Grant 8,860,142 - Poon , et al. October 14, 2	2014-10-14
Strained channel transistor structure and method Grant 8,754,447 - Liu , et al. June 17, 2	2014-06-17
Method for fabricating a semiconductor device having an epitaxial channel and transistor having same Grant 8,716,076 - Liu , et al. May 6, 2	2014-05-06
Reliable Interconnect For Semiconductor Device App 20140084486 - ZHANG; Fan ; et al.	2014-03-27
Dielectric stack Grant 8,664,711 - Jung , et al. March 4, 2	2014-03-04
Spacer-less low-K dielectric processes Grant 8,624,329 - Lee , et al. January 7, 2	2014-01-07
Dielectric Stack App 20140001538 - JUNG; Sung Mun ; et al.	2014-01-02
Reliable interconnect for semiconductor device Grant 8,598,031 - Zhang , et al. December 3, 2	2013-12-03
Statistical optical proximity correction Grant 8,572,524 - Zhou , et al. October 29, 2	2013-10-29
Integrated circuit and method of fabrication thereof Grant 8,546,873 - Liu , et al. October 1, 2	2013-10-01
Dielectric stack Grant 8,541,273 - Jung , et al. September 24, 2	2013-09-24
Integrated circuit system with through silicon via and method of manufacture thereof Grant 8,536,705 - Yelehanka , et al. September 17, 2	2013-09-17
Method and system for introducing physical damage into an integrated circuit device for verifying testing program and its results Grant 8,489,945 - Mai , et al. July 16, 2	2013-07-16
Method And Apparatus To Reduce Thermal Variations Within An Integrated Circuit Die Using Thermal Proximity Correction App 20130099321 - Poon; Debora Chyiu Hyia ; et al.	2013-04-25
Integrated circuit system with via and method of manufacture thereof Grant 8,405,222 - Yu , et al. March 26, 2	2013-03-26
Method of forming high-k dielectric stop layer for contact hole opening Grant 8,354,347 - Ye , et al. January 15, 2	2013-01-15
Defect monitoring in semiconductor device fabrication Grant 8,339,449 - Lim , et al. December 25, 2	2012-12-25
Critical dimension for trench and vias Grant 8,293,545 - Cong , et al. October 23, 2	2012-10-23
Method and apparatus to reduce thermal variations within an integrated circuit die using thermal proximity correction Grant 8,293,544 - Poon , et al. October 23, 2	2012-10-23
Defect detection recipe definition Grant 8,289,508 - Lim , et al. October 16, 2	2012-10-16
Apparatus And Methods For Cleaning And Drying Of Wafers App 20120255586 - SEAH; Boon Meng ; et al.	2012-10-11
Integrated Circuit System With Through Silicon Via And Method Of Manufacture Thereof App 20120205806 - YELEHANKA; Pradeep Ramachandramurthy ; et al.	2012-08-16
Integrated circuit system with through silicon via and method of manufacture thereof Grant 8,236,688 - Yelehanka , et al. August 7, 2	2012-08-07
Method of forming shallow trench isolation structures for integrated circuits Grant 8,178,417 - Mishra , et al. May 15, 2	2012-05-15
Test chiplets for devices Grant 8,178,368 - Lim , et al. May 15, 2	2012-05-15
Apparatus and methods for cleaning and drying of wafers Grant 8,177,993 - Seah , et al. May 15, 2	2012-05-15
Integrated circuit system employing backside energy source for electrical contact formation Grant 8,158,513 - Mai , et al. April 17, 2	2012-04-17
Method and system for introducing physical damage into an integrated circuit device for verifying testing program and its results App 20120086468 - Mai; Zhihong ; et al.	2012-04-12
Dielectric Stack App 20120074537 - JUNG; Sung Mun ; et al.	2012-03-29
Nested and isolated transistors with reduced impedance difference Grant 8,143,651 - Widodo , et al. March 27, 2	2012-03-27
Reliable interconnects Grant 8,102,054 - Zhang , et al. January 24, 2	2012-01-24
Integrated Circuit And Method Of Fabrication Thereof App 20120012940 - LIU; Jinping ; et al.	2012-01-19
Integrated Circuit System With Via And Method Of Manufacture Thereof App 20110316166 - Yu; Hong ; et al.	2011-12-29
Method For Fabricating A Semiconductor Device Having An Epitaxial Channel And Transistor Having Same App 20110281410 - LIU; JINPING ; et al.	2011-11-17
Integrated circuit and method of fabrication thereof Grant 8,058,123 - Liu , et al. November 15, 2	2011-11-15
Mask and method to pattern chromeless phase lithography contact hole Grant 8,057,968 - Tan , et al. November 15, 2	2011-11-15
Method and apparatus for removing radiation side lobes Grant 8,048,588 - Tan , et al. November 1, 2	2011-11-01
Integrated Circuit System With Through Silicon Via And Method Of Manufacture Thereof App 20110237072 - Yelehanka; Pradeep Ramachandramurthy ; et al.	2011-09-29
Method for fabricating a semiconductor device having an epitaxial channel and transistor having same Grant 8,012,839 - Liu , et al. September 6, 2	2011-09-06
Method to remove spacer after salicidation to enhance contact etch stop liner stress on MOS Grant 7,999,325 - Teh , et al. August 16, 2	2011-08-16
Grain boundary blocking for stress migration and electromigration improvement in CU interconnects Grant 7,989,338 - Zhang , et al. August 2, 2	2011-08-02
Method for reducing silicide defects in integrated circuits Grant 7,960,283 - Ye , et al. June 14, 2	2011-06-14
Method of manufacture an integrated circuit system with through silicon via Grant 7,960,282 - Yelehanka , et al. June 14, 2	2011-06-14
Defect Detection Recipe Definition App 20110116085 - LIM; Victor Seng Keong ; et al.	2011-05-19
Test Chiplets For Devices App 20110114949 - LIM; Victor Seng Keong ; et al.	2011-05-19
Method of fabricating a nitrogenated silicon oxide layer and MOS device having same Grant 7,928,020 - Liu , et al. April 19, 2	2011-04-19
Reliable Interconnect For Semiconductor Device App 20110074039 - ZHANG; Fan ; et al.	2011-03-31
Defect Monitoring In Semiconductor Device Fabrication App 20110032348 - LIM; Barbara Fong Chin ; et al.	2011-02-10
Reliable Interconnects App 20100314774 - ZHANG; Bei Chao ; et al.	2010-12-16
Strained Channel Transistor Structure And Method App 20100308374 - LIU; Jin Ping ; et al.	2010-12-09
Nested And Isolated Transistors With Reduced Impedance Difference App 20100301424 - WIDODO; Johnny ; et al.	2010-12-02
Integrated Circuit System With Through Silicon Via And Method Of Manufacture Thereof App 20100297844 - Yelehanka; Pradeep Ramachandramurthy ; et al.	2010-11-25
Interconnections for integrated circuits including reducing an overburden and annealing Grant 7,833,900 - Leong , et al. November 16, 2	2010-11-16
Method For Reducing Silicide Defects In Integrated Circuits App 20100267236 - YE; Jianhui ; et al.	2010-10-21
Reliable interconnects Grant 7,803,704 - Zhang , et al. September 28, 2	2010-09-28
Integrated circuit system employing selective epitaxial growth technology Grant 7,795,680 - Liu , et al. September 14, 2	2010-09-14
Formation of metal silicide layer over copper interconnect for reliability enhancement Grant 7,790,617 - Lim , et al. September 7, 2	2010-09-07
Strained channel transistor structure and method Grant 7,776,699 - Liu , et al. August 17, 2	2010-08-17
Mask And Method To Pattern Chromeless Phase Lithography Contact Hole App 20100196805 - TAN; Sia Kim ; et al.	2010-08-05
Nested and isolated transistors with reduced impedance difference Grant 7,767,577 - Widodo , et al. August 3, 2	2010-08-03
Integrated circuit processing system Grant 7,749,894 - Wang , et al. July 6, 2	2010-07-06
Method for reducing silicide defects in integrated circuits Grant 7,745,320 - Ye , et al. June 29, 2	2010-06-29
Integrated Circuit System Employing Stress-engineered Layers App 20100109045 - Liu; Jin Ping ; et al.	2010-05-06
Reliable level shifter of ultra-high voltage device used in low power application Grant 7,710,182 - Yu , et al. May 4, 2	2010-05-04
Integrated Circuit System Employing Backside Energy Source For Electrical Contact Formation App 20100087061 - Mai; Zhihong ; et al.	2010-04-08
Structure and method to prevent charge damage from e-beam curing process Grant 7,678,586 - Liu , et al. March 16, 2	2010-03-16
Spacer-less Low-K Dielectric Processes App 20100059831 - Lee; Yong Meng ; et al.	2010-03-11
Reliable Interconnects App 20100044869 - ZHANG; Bei Chao ; et al.	2010-02-25
Mask and method to pattern chromeless phase lithography contact hole Grant 7,655,388 - Tan , et al. February 2, 2	2010-02-02
Method and apparatus to reduce thermal variations within an integrated circuit die using thermal proximity correction App 20100019329 - Poon; Debora Chyiu Hyia ; et al.	2010-01-28
Phase shifting photolithography system Grant 7,649,612 - Lin , et al. January 19, 2	2010-01-19
Integrated Circuit System Employing Single Mask Layer Technique For Well Formation App 20100009527 - Lee; Yong Meng ; et al.	2010-01-14
Method to fabricate variable work function gates for FUSI devices Grant 7,645,687 - Chong , et al. January 12, 2	2010-01-12
Implantation for shallow trench isolation (STI) formation and for stress for transistor performance enhancement App 20090315115 - Zhang; Beichao ; et al.	2009-12-24
Method For Reducing Silicide Defects In Integrated Circuits App 20090289309 - YE; Jianhui ; et al.	2009-11-26
Semiconductor processing system with ultra low-K dielectric Grant 7,622,403 - Yudhistira , et al. November 24, 2	2009-11-24
Spacer-less low-k dielectric processes Grant 7,615,427 - Lee , et al. November 10, 2	2009-11-10
Method Of Forming Shallow Trench Isolation Structures For Integrated Circuits App 20090261448 - MISHRA; Shailendra ; et al.	2009-10-22
Protruded contact and insertion of inter-layer-dielectric material to match damascene hardmask to improve undercut for low-k interconnects Grant 7,601,607 - Liu , et al. October 13, 2	2009-10-13
Interconnections For Integrated Circuits App 20090233441 - Leong; Lup San ; et al.	2009-09-17
Combined copper plating method to improve gap fill Grant 7,585,768 - Bu , et al. September 8, 2	2009-09-08
Method For Fabricating A Semiconductor Device Having An Epitaxial Channel And Transistor Having Same App 20090218597 - Liu; Jinping ; et al.	2009-09-03
Nested And Isolated Transistors With Reduced Impedance Difference App 20090206408 - WIDODO; Johnny ; et al.	2009-08-20
Strained Channel Transistor Structure And Method App 20090194788 - LIU; Jin Ping ; et al.	2009-08-06
Polarizing photolithography system Grant 7,560,199 - Tan , et al. July 14, 2	2009-07-14
Method and apparatus for contact hole unit cell formation Grant 7,556,891 - Tan , et al. July 7, 2	2009-07-07
Method of forming high-k dielectric stop layer for contact hole opening App 20090146296 - YE; Jianhui ; et al.	2009-06-11
Integrated Circuit System Employing Selective Epitaxial Growth Technology App 20090146262 - Liu; Huang ; et al.	2009-06-11
Integrated Circuit And Method Of Fabrication Thereof App 20090140292 - LIU; Jinping ; et al.	2009-06-04
Statistical Optical Proximity Correction App 20090132992 - ZHOU; Wenzhan ; et al.	2009-05-21
Wing gate transistor for integrated circuits Grant 7,528,445 - Phua , et al. May 5, 2	2009-05-05
Critical Dimension For Trench And Vias App 20090108257 - Cong; Hai ; et al.	2009-04-30
Entire encapsulation of Cu interconnects using self-aligned CuSiN film Grant 7,524,755 - Widodo , et al. April 28, 2	2009-04-28
Method Of Fabricating A Nitrogenated Silicon Oxide Layer And Mos Device Having Same App 20090088002 - Liu; Jinping ; et al.	2009-04-02
Method For Fabricating A Semiconductor Structure Having Heterogeneous Crystalline Orientations App 20090053864 - Liu; Jinping ; et al.	2009-02-26
Method To Remove Spacer After Salicidation To Enhance Contact Etch Stop Liner Stress On Mos App 20090026549 - TEH; Young Way ; et al.	2009-01-29
Reliable Level Shifter Of Ultra-high Voltage Device Used In Low Power Application App 20090021292 - YU; Hung Chang ; et al.	2009-01-22
Method For Forming High-k Charge Storage Device App 20090023280 - ANG; Chew-Hoe ; et al.	2009-01-22
Method for forming high-K charge storage device Grant 7,479,425 - Ang , et al. January 20, 2	2009-01-20
Semiconductor System Having Complementary Strained Channels App 20080315317 - Lai; Chung Woh ; et al.	2008-12-25
Method to resolve line end distortion for alternating phase shift mask Grant 7,445,874 - Tan , et al. November 4, 2	2008-11-04
Method to remove spacer after salicidation to enhance contact etch stop liner stress on MOS Grant 7,445,978 - Teh , et al. November 4, 2	2008-11-04
System and method for phase shift assignment Grant 7,421,676 - Tan , et al. September 2, 2	2008-09-02
Semiconductor Processing System With Ultra Low-k Dielectric App 20080145795 - Yudhistira; Yasri ; et al.	2008-06-19
Anti-reflective sidewall coated alternating phase shift mask and fabrication method Grant 7,384,714 - Tan , et al. June 10, 2	2008-06-10
Integrated Circuit Processing System App 20080111238 - Wang; Xianbin ; et al.	2008-05-15
Apparatus and methods for Cleaning and Drying of wafers App 20080105653 - Seah; Boon Meng ; et al.	2008-05-08
Semiconductor Device With Doped Transistor App 20080087958 - Verma; Purakh Raj ; et al.	2008-04-17
Implantation-less approach to fabricating strained semiconductor on isolation wafers Grant 7,338,886 - Liu , et al. March 4, 2	2008-03-04
Method for CuO reduction by using two step nitrogen oxygen and reducing plasma treatment Grant 7,332,422 - Lu , et al. February 19, 2	2008-02-19
Semiconductor device and fabrication method Grant 7,326,609 - Verma , et al. February 5, 2	2008-02-05
Metal barrier cap fabrication by polymer lift-off Grant 7,323,408 - Zhang , et al. January 29, 2	2008-01-29
Combined copper plating method to improve gap fill App 20070293039 - Bu; Xiaomei ; et al.	2007-12-20
Spacer-less low-k dielectric processes App 20070281410 - Lee; Yong Meng ; et al.	2007-12-06
Protruded contact and insertion of inter-layer-dielectric material to match damascene hardmask to improve undercut for low-k interconnects App 20070264820 - Liu; Wuping ; et al.	2007-11-15
Method of fabrication of a die oxide ring Grant 7,276,440 - Zhang , et al. October 2, 2	2007-10-02
High density plasma and bias RF power process to make stable FSG with less free F and SiN with less H to enhance the FSG/SiN integration reliability Grant 7,271,110 - Lu , et al. September 18, 2	2007-09-18
Entire encapsulation of Cu interconnects using self-aligned CuSiN film App 20070197023 - Widodo; Johnny ; et al.	2007-08-23
Composite stress spacer Grant 7,256,084 - Lim , et al. August 14, 2	2007-08-14
Self-patterning of photo-active dielectric materials for interconnect isolation Grant 7,256,136 - Liu , et al. August 14, 2	2007-08-14
Laser activation of implanted contact plug for memory bitline fabrication Grant 7,256,112 - Chong , et al. August 14, 2	2007-08-14
Integrated circuit system using dual damascene process Grant 7,253,097 - Lim , et al. August 7, 2	2007-08-07
Phase Shifting Photolithography System App 20070177121 - Lin; Qunying ; et al.	2007-08-02
Method to control dual damascene trench etch profile and trench depth uniformity Grant 7,247,555 - Cong , et al. July 24, 2	2007-07-24
Integrated circuit with protective moat Grant 7,224,060 - Zhang , et al. May 29, 2	2007-05-29
Formation of metal silicide layer over copper interconnect for reliability enhancement App 20070111522 - Lim; Yeow Kheng ; et al.	2007-05-17
Polarizing Photolithography System App 20070092839 - Tan; Sia Kim ; et al.	2007-04-26
Integrated Circuit Stress Control System App 20070090484 - Lee; Jae Gon ; et al.	2007-04-26
Method of forming ultra thin silicon oxynitride for gate dielectric applications Grant 7,202,164 - Liu , et al. April 10, 2	2007-04-10
Method to fabricate Ge and Si devices together for performance enhancement Grant 7,202,140 - Ang , et al. April 10, 2	2007-04-10
Method of forming a relaxed semiconductor buffer layer on a substrate with a large lattice mismatch Grant 7,166,522 - Liu , et al. January 23, 2	2007-01-23
Integrated Circuit System Using Dual Damascene Process App 20070001303 - Lim; Yeow Kheng ; et al.	2007-01-04
Metal barrier cap fabrication by polymer lift-off Grant 7,153,766 - Zhang , et al. December 26, 2	2006-12-26
Grain boundary blocking for stress migration and electromigration improvement in CU interconnects App 20060286797 - Zhang; Fan ; et al.	2006-12-21
Composite stress spacer App 20060252194 - Lim; Khee Yong ; et al.	2006-11-09
Method to remove spacer after salicidation to enhance contact etch stop liner stress on MOS App 20060249794 - Teh; Young Way ; et al.	2006-11-09
Semiconductor Device And Fabrication Method App 20060252188 - Verma; Purakh Raj ; et al.	2006-11-09
Implantation-less approach to fabricating strained semiconductor on isolation wafers App 20060234479 - Liu; Jinping ; et al.	2006-10-19
Structure and method of liner air gap formation Grant 7,094,669 - Bu , et al. August 22, 2	2006-08-22
Wing Gate Transistor For Integrated Circuits App 20060180848 - Phua; Timothy ; et al.	2006-08-17
Selective oxide trimming to improve metal T-gate transistor Grant 7,084,025 - Phua , et al. August 1, 2	2006-08-01
Method to fabricate variable work function gates for FUSI devices App 20060160290 - Chong; Yung Fu ; et al.	2006-07-20
Method for forming high-K charge storage device App 20060160303 - Ang; Chew-Hoe ; et al.	2006-07-20
Laser activation of implanted contact plug for memory bitline fabrication App 20060160343 - Chong; Yung Fu ; et al.	2006-07-20
High density plasma and bias RF power process to make stable FSG with less free F and SiN with less H to enhance the FSG/SiN integration reliability App 20060148270 - Lu; Wei ; et al.	2006-07-06
Method for CuO reduction by using two step nitrogen oxygen and reducing plasma treatment App 20060148255 - Lu; Wei ; et al.	2006-07-06
Mask and method to pattern chromeless phase lithography contact hole App 20060147813 - Tan; Sya Kim ; et al.	2006-07-06
Self-patterning of photo-active dielectric materials for interconnect isolation App 20060128156 - Liu; Wuping ; et al.	2006-06-15
Method of forming wing gate transistor for integrated circuits Grant 7,056,799 - Phua , et al. June 6, 2	2006-06-06
Method of forming ultra thin silicon oxynitride for gate dielectric applications App 20060110865 - Liu; Jinping ; et al.	2006-05-25
Method for engineering hybrid orientation/material semiconductor substrate App 20060105533 - Chong; Yung Fu ; et al.	2006-05-18
Structure and method to fabricate a protective sidewall liner for an optical mask App 20060105520 - Tan; Sia Kim ; et al.	2006-05-18
Method to resolve line end distortion for alternating phase shift mask App 20060099518 - Tan; Sia Kim ; et al.	2006-05-11
Metal barrier cap fabrication by polymer lift-off App 20060088995 - Zhang; Beichao ; et al.	2006-04-27
Method and apparatus for contact hole unit cell formation App 20060088770 - Tan; Soon Yoeng ; et al.	2006-04-27
Anti-reflective sidewall coated alternating phase shift mask and fabrication method App 20060088771 - Tan; Sia Kim ; et al.	2006-04-27
Method and apparatus for removing radiation side lobes App 20060083994 - Tan; Sia Kim ; et al.	2006-04-20
System and method for phase shift assignment App 20060075376 - Tan; Sia Kim ; et al.	2006-04-06
Self-patterning of photo-active dielectric materials for interconnect isolation Grant 7,012,022 - Liu , et al. March 14, 2	2006-03-14
Slot designs in wide metal lines App 20060040491 - Lim; Yeow Kheng ; et al.	2006-02-23
Structure and method of liner air gap formation App 20060030128 - Bu; Xiaomei ; et al.	2006-02-09
Method of forming a relaxed semiconductor buffer layer on a substrate with a large lattice mismatch Grant 6,995,078 - Liu , et al. February 7, 2	2006-02-07
Selective oxide trimming to improve metal T-gate transistor App 20060008973 - Phua; Timothy Wee Hong ; et al.	2006-01-12
Conductive compound cap layer App 20060001170 - Zhang; Fan ; et al.	2006-01-05
Wing gate transistor for integrated circuits App 20050227423 - Phua, Timothy ; et al.	2005-10-13
Barrier metal cap structure on copper lines and vias App 20050191851 - Liu, Wuping ; et al.	2005-09-01
Integrated circuit with protective moat App 20050167824 - Zhang, Fan ; et al.	2005-08-04
Novel method to control dual damascene trench etch profile and trench depth uniformity App 20050170625 - Cong, Hai ; et al.	2005-08-04
Method of forming a relaxed semiconductor buffer layer on a substrate with a large lattice mismatch App 20050164436 - Liu, Jin Ping ; et al.	2005-07-28
Method of forming a relaxed semiconductor buffer layer on a substrate with a large lattice mismatch App 20050164473 - Liu, Jin Ping ; et al.	2005-07-28
Method of fabrication of a die oxide ring App 20050127495 - Zhang, Fan ; et al.	2005-06-16
Self-patterning of photo-active dielectric materials for interconnect isolation App 20050093158 - Liu, Wuping ; et al.	2005-05-05
Use of amorphous carbon as a removable ARC material for dual damascene fabrication Grant 6,787,452 - Sudijono , et al. September 7, 2	2004-09-07
Metal barrier cap fabrication by polymer lift-off App 20040137709 - Zhang, Beichao ; et al.	2004-07-15
Method of forming a high performance and low cost CMOS device Grant 6,762,085 - Zheng , et al. July 13, 2	2004-07-13
Method of forming a high performance and low cost CMOS device App 20040063264 - Zheng, Jia Zhen ; et al.	2004-04-01
Barrier metal cap structure on copper lines and vias App 20040048468 - Liu, Wuping ; et al.	2004-03-11
Method for forming gate insulating layer having multiple dielectric constants and multiple equivalent oxide thicknesses App 20040029321 - Ang, Chew Hoe ; et al.	2004-02-12
Inverse-T tungsten gate apparatus Grant 6,057,576 - Hsia , et al. May 2, 2	2000-05-02
Method of fabricating embedded dynamic random access memory Grant 6,048,762 - Hsia , et al. April 11, 2	2000-04-11
Stacked capacitor having improved charge storage capacity Grant 6,008,515 - Hsia , et al. December 28, 1	1999-12-28
Method of making an inverse-T tungsten gate Grant 5,858,867 - Hsia , et al. January 12, 1	1999-01-12
Method of forming stacked capacitor having corrugated side-wall structure Grant 5,851,898 - Hsia , et al. December 22, 1	1998-12-22
Double-side corrugated cylindrical capacitor structure of high density DRAMs Grant 5,843,822 - Hsia , et al. December 1, 1	1998-12-01
Additive metalization using photosensitive polymer as RIE mask and part of composite insulator Grant 5,827,780 - Hsia , et al. October 27, 1	1998-10-27
Method of making corrugated cell contact Grant 5,789,267 - Hsia , et al. August 4, 1	1998-08-04
Wafer metrology pattern integrating both overlay and critical dimension features for SEM or AFM measurements Grant 5,701,013 - Hsia , et al. December 23, 1	1997-12-23
Antireflection coating for highly reflective photolithographic layers comprising chromium oxide or chromium suboxide Grant 5,672,243 - Hsia , et al. September 30, 1	1997-09-30
CMOS transistor with two-layer inverse-T tungsten gate Grant 5,633,522 - Dorleans , et al. May 27, 1	1997-05-27
Method for fabricating a MOS transistor with two-layer inverse-T tungsten gate structure Grant 5,599,725 - Dorleans , et al. February 4, 1	1997-02-04
Process for fabricating a low dielectric composite substrate Grant 5,277,725 - Acocella , et al. January 11, 1	1994-01-11
Process for fabricating a low dielectric composite substrate Grant 5,135,595 - Acocella , et al. August 4, 1	1992-08-04
Elastomeric connectors for electronic packaging and testing Grant 4,932,883 - Hsia , et al. June 12, 1	1990-06-12

Company Registrations

SEC

0001538840

Hsia Liang Choo