loadpatents
Patent applications and USPTO patent grants for Hower; Philip L..The latest application filed is for "lateral mosfet with buried drain extension layer".
Patent | Date |
---|---|
Lateral MOSFET with buried drain extension layer Grant 11,152,459 - Denison , et al. October 19, 2 | 2021-10-19 |
Transistor having double isolation with one floating isolation Grant 10,937,905 - Zhang , et al. March 2, 2 | 2021-03-02 |
Lateral Mosfet With Buried Drain Extension Layer App 20200146945 - DENISON; Marie ;   et al. | 2020-05-14 |
Integrated high-side driver for P-N bimodal power device Grant 10,601,422 - Zhang , et al. | 2020-03-24 |
Lateral MOSFET with buried drain extension layer Grant 10,535,731 - Denison , et al. Ja | 2020-01-14 |
Vertical thermoelectric structures Grant 10,446,734 - Male , et al. Oc | 2019-10-15 |
Structures to avoid floating resurf layer in high voltage lateral devices Grant 10,319,809 - Zhang , et al. | 2019-06-11 |
Lateral Mosfet With Buried Drain Extension Layer App 20180240870 - DENISON; Marie ;   et al. | 2018-08-23 |
Lateral MOSFET with buried drain extension layer Grant 9,985,095 - Denison , et al. May 29, 2 | 2018-05-29 |
Structures To Avoid Floating Resurf Layer In High Voltage Lateral Devices App 20180108729 - Zhang; Yongxi ;   et al. | 2018-04-19 |
Integrated High-side Driver For P-n Bimodal Power Device App 20180097517 - Zhang; Yongxi ;   et al. | 2018-04-05 |
Structures to avoid floating RESURF layer in high voltage lateral devices Grant 9,876,071 - Zhang , et al. January 23, 2 | 2018-01-23 |
Integrated high-side driver for P-N bimodal power device Grant 9,843,322 - Zhang , et al. December 12, 2 | 2017-12-12 |
High voltage drain extension on thin buried oxide SOI Grant 9,806,190 - Denison , et al. October 31, 2 | 2017-10-31 |
Integrated High-Side Driver For P-N Bimodal Power Device App 20170264289 - Zhang; Yongxi ;   et al. | 2017-09-14 |
Vertical Thermoelectric Structures App 20160351772 - Male; Barry Jon ;   et al. | 2016-12-01 |
Lateral Mosfet With Buried Drain Extension Layer App 20160300946 - DENISON; Marie ;   et al. | 2016-10-13 |
Structures To Avoid Floating Resurf Layer In High Voltage Lateral Devices App 20160254346 - Zhang; Yongxi ;   et al. | 2016-09-01 |
Lateral MOSFET with buried drain extension layer Grant 9,397,211 - Denison , et al. July 19, 2 | 2016-07-19 |
Vertical thermoelectric structures Grant 9,349,933 - Male , et al. May 24, 2 | 2016-05-24 |
Transistor Having Double Isolation With One Floating Isolation App 20150340496 - ZHANG; YONGXI ;   et al. | 2015-11-26 |
IC with floating buried layer ring for isolation of embedded islands Grant 9,087,708 - Lin , et al. July 21, 2 | 2015-07-21 |
Lateral Mosfet With Buried Drain Extension Layer App 20150179793 - DENISON; Marie ;   et al. | 2015-06-25 |
Ic With Floating Buried Layer Ring For Isolation Of Embedded Islands App 20150041907 - LIN; JOHN ;   et al. | 2015-02-12 |
Integrated high voltage divider Grant 8,878,330 - Kawahara , et al. November 4, 2 | 2014-11-04 |
Integrated gate controlled high voltage divider Grant 8,872,273 - Kawahara , et al. October 28, 2 | 2014-10-28 |
Method of making vertical transistor with graded field plate dielectric Grant 8,853,029 - Denison , et al. October 7, 2 | 2014-10-07 |
Vertical Thermoelectric Structures App 20140216517 - Male; Barry Jon ;   et al. | 2014-08-07 |
Vertical thermoelectric structures Grant 8,728,846 - Male , et al. May 20, 2 | 2014-05-20 |
Integrated lateral high voltage MOSFET Grant 8,643,099 - Denison , et al. February 4, 2 | 2014-02-04 |
Integrated Lateral High Voltage Mosfet App 20130277739 - Denison; Marie ;   et al. | 2013-10-24 |
Integrated lateral high voltage MOSFET Grant 8,476,127 - Denison , et al. July 2, 2 | 2013-07-02 |
Circuit having integrated heating structure for parametric trimming Grant 8,461,589 - Hower , et al. June 11, 2 | 2013-06-11 |
Integrated Gate Controlled High Voltage Divider App 20130032863 - Kawahara; Hideaki ;   et al. | 2013-02-07 |
Integrated High Voltage Divider App 20130032922 - Kawahara; Hideaki ;   et al. | 2013-02-07 |
Isolation trench with rounded corners for BiCMOS process Grant 8,274,131 - Pendharkar , et al. September 25, 2 | 2012-09-25 |
Integrated Lateral High Voltage Mosfet App 20120112277 - Denison; Marie ;   et al. | 2012-05-10 |
High Voltage Drain Extension On Thin Buried Oxide Soi App 20120104497 - Denison; Marie ;   et al. | 2012-05-03 |
Method Of Making Vertical Transistor With Graded Field Plate Dielectric App 20110275210 - Denison; Marie ;   et al. | 2011-11-10 |
Integration of high voltage JFET in linear bipolar CMOS process Grant 7,989,853 - Hao , et al. August 2, 2 | 2011-08-02 |
ISOLATION TRENCH WITH ROUNDED CORNERS FOR BiCMOS PROCESS App 20110073955 - Pendharkar; Sameer P. ;   et al. | 2011-03-31 |
Distributed high voltage JFET Grant 7,910,417 - Hower , et al. March 22, 2 | 2011-03-22 |
Isolation trench with rounded corners for BiCMOS process Grant 7,846,789 - Pendharkar , et al. December 7, 2 | 2010-12-07 |
Field Plate Trench Mosfet Transistor With Graded Dielectric Liner Thickness App 20100264486 - Denison; Marie ;   et al. | 2010-10-21 |
Integrated circuit having a top side wafer contact and a method of manufacture therefor Grant 7,741,205 - Phan , et al. June 22, 2 | 2010-06-22 |
High voltage depletion FET employing a channel stopping implant Grant 7,736,961 - Merchant , et al. June 15, 2 | 2010-06-15 |
Vertical Thermoelectric Structures App 20100044704 - Male; Barry John ;   et al. | 2010-02-25 |
Integration Of High Voltage Jfet In Linear Bipolar Cmos Process App 20100032729 - HAO; Pinghai ;   et al. | 2010-02-11 |
Distributed high voltage JFET Grant 7,605,412 - Hower , et al. October 20, 2 | 2009-10-20 |
BVDII Enhancement with a Cascode DMOS App 20090159968 - Merchant; Steve L. ;   et al. | 2009-06-25 |
Distributed High Voltage Jfet App 20080299716 - Hower; Philip L. ;   et al. | 2008-12-04 |
Distributed high voltage JFET Grant 7,417,270 - Hower , et al. August 26, 2 | 2008-08-26 |
Integrated Circuit Having a Top Side Wafer Contact and a Method of Manufacture Therefor App 20080132066 - Phan; Tony T. ;   et al. | 2008-06-05 |
Integrated circuit having a top side wafer contact and a method of manufacture therefor Grant 7,345,343 - Phan , et al. March 18, 2 | 2008-03-18 |
N-channel LDMOS with buried P-type region to prevent parasitic bipolar effects Grant 7,268,045 - Hower , et al. September 11, 2 | 2007-09-11 |
Integrated circuit having a transistor level top side wafer contact and a method of manufacture therefor Grant 7,262,109 - Lin , et al. August 28, 2 | 2007-08-28 |
Premature breakdown in submicron device geometries Grant 7,195,965 - Lin , et al. March 27, 2 | 2007-03-27 |
Distributed power MOSFET Grant 7,187,034 - Hower , et al. March 6, 2 | 2007-03-06 |
Integrated circuit having a transistor level top side wafer contact and a method of manufacture therefor App 20070045732 - Lin; John ;   et al. | 2007-03-01 |
Integrated circuit having a top side wafer contact and a method of manufacture therefor App 20070029611 - Phan; Tony T. ;   et al. | 2007-02-08 |
Distributed High Voltage Jfet App 20070012958 - Hower; Philip L. ;   et al. | 2007-01-18 |
High voltage depletion FET employing a channel stopping implant App 20060292771 - Merchant; Steven L. ;   et al. | 2006-12-28 |
Distributed high voltage JFET App 20050285157 - Hower, Philip L. ;   et al. | 2005-12-29 |
N-channel LDMOS with buried P-type region to prevent parasitic bipolar effects App 20050255655 - Hower, Philip L. ;   et al. | 2005-11-17 |
N-channel LDMOS with buried p-type region to prevent parasitic bipolar effects Grant 6,958,515 - Hower , et al. October 25, 2 | 2005-10-25 |
Transistor with improved safe operating area Grant 6,878,999 - Hower , et al. April 12, 2 | 2005-04-12 |
Transistor With Improved Safe Operating Area App 20050012148 - Hower, Philip L. ;   et al. | 2005-01-20 |
Distributed power MOSFET App 20040256669 - Hower, Philip L. ;   et al. | 2004-12-23 |
Segmented power MOSFET of safe operation Grant 6,815,276 - Hower , et al. November 9, 2 | 2004-11-09 |
Premature breakdown in submicron device geometries App 20040079991 - Lin, John ;   et al. | 2004-04-29 |
Distributed power MOSFET App 20040067617 - Hower, Philip L. ;   et al. | 2004-04-08 |
ESD robust bipolar transistor with high variable trigger and sustaining voltages Grant 6,624,481 - Pendharkar , et al. September 23, 2 | 2003-09-23 |
LDMOS with improved safe operating area App 20020109184 - Hower, Philip L. ;   et al. | 2002-08-15 |
Metal-oxide-semiconductor transistor structure and method of manufacturing same App 20020079514 - Hower, Philip L. ;   et al. | 2002-06-27 |
Using segmented N-type channel stop to enhance the SOA (safe-operating area) of LDMOS transistors App 20020070394 - Lin, John ;   et al. | 2002-06-13 |
Structure for fast-recovery bipolar devices Grant 4,901,120 - Weaver , et al. February 13, 1 | 1990-02-13 |
Method for reducing leakage currents in semiconductor devices Grant 4,551,353 - Hower , et al. November 5, 1 | 1985-11-05 |
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