Houmura; Shigeo
Patent Applications and Registrations
Patent applications and USPTO patent grants for Houmura; Shigeo.The latest application filed is for "input circuit".
- Houmura; Shigeo - Kyoto JP
| Patent | Date |
|---|---|
| Input circuit Grant 8,952,739 - Koike , et al. February 10, 2 | 2015-02-10 |
| Input Circuit App 20140028362 - KOIKE; Tsuyoshi ; et al. | 2014-01-30 |
| Decoder circuit Grant 7,656,197 - Masuo , et al. February 2, 2 | 2010-02-02 |
| Decoder Circuit App 20090108876 - Masuo; Akira ; et al. | 2009-04-30 |
| Decoder circuit Grant 7,486,113 - Masuo , et al. February 3, 2 | 2009-02-03 |
| Decoder circuit App 20070139230 - Masuo; Akira ; et al. | 2007-06-21 |
| Semiconductor memory device Grant 6,982,899 - Sumitani , et al. January 3, 2 | 2006-01-03 |
| Semiconductor memory App 20050068824 - Houmura, Shigeo ; et al. | 2005-03-31 |
| Semiconductor memory device App 20040141362 - Sumitani, Norihiko ; et al. | 2004-07-22 |
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