| Patent | Date |
|---|
Ternary content addressable memory (TCAM) for multi bit miss detect circuit
Grant 9,916,896 - Arsovski , et al. March 13, 2 | 2018-03-13 |
Content-addressable Memory Having Multiple Reference Matchlines To Reduce Latency
App 20170200500 - Arsovski; Igor ; et al. | 2017-07-13 |
Content-addressable memory having multiple reference matchlines to reduce latency
Grant 9,704,575 - Arsovski , et al. July 11, 2 | 2017-07-11 |
Matchline precharge architecture for self-reference matchline sensing
Grant 9,583,192 - Arsovski , et al. February 28, 2 | 2017-02-28 |
Majority dominant power scheme for repeated structures and structures thereof
Grant 9,172,371 - Arsovski , et al. October 27, 2 | 2015-10-27 |
Statistical Power Estimation
App 20150025857 - Arsovski; Igor ; et al. | 2015-01-22 |
Fine granularity power gating
Grant 8,611,169 - Houle , et al. December 17, 2 | 2013-12-17 |
Majority Dominant Power Scheme For Repeated Structures And Structures Thereof
App 20130307580 - ARSOVSKI; Igor ; et al. | 2013-11-21 |
Methods and systems for adjusting wordline up-level voltage to improve production yield relative to SRAM-cell stability
Grant 8,582,351 - Arsovski , et al. November 12, 2 | 2013-11-12 |
Majority Dominant Power Scheme For Repeated Structures And Structures Thereof
App 20130234754 - Arsovski; Igor ; et al. | 2013-09-12 |
Majority dominant power scheme for repeated structures and structures thereof
Grant 8,525,546 - Arsovski , et al. September 3, 2 | 2013-09-03 |
Fine Granularity Power Gating
App 20130148455 - Houle; Robert M. ; et al. | 2013-06-13 |
SRAM delay circuit that tracks bitcell characteristics
Grant 8,233,337 - Arsovski , et al. July 31, 2 | 2012-07-31 |
SRAM having wordline up-level voltage adjustable to assist bitcell stability and design structure for same
Grant 8,228,713 - Arsovski , et al. July 24, 2 | 2012-07-24 |
SRAM Having Wordline Up-Level Voltage Adjustable to Assist Bitcell Stability and Design Structure for Same
App 20120075918 - Arsovski; Igor ; et al. | 2012-03-29 |
Methods and Systems for Adjusting Wordline Up-Level Voltage to Improve Production Yield Relative to SRAM-Cell Stability
App 20120075919 - Arsovski; Igor ; et al. | 2012-03-29 |
Low power, single-ended sensing in a multi-port SRAM using pre-discharged bit lines
Grant 7,986,571 - Arsovski , et al. July 26, 2 | 2011-07-26 |
Method for low power sensing in a multi-port SRAM using pre-discharged bit lines
Grant 7,940,581 - Arsovski , et al. May 10, 2 | 2011-05-10 |
Sram Delay Circuit That Tracks Bitcell Characteristics
App 20110090750 - Arsovski; Igor ; et al. | 2011-04-21 |
APPARATUS AND METHOD FOR IMPLEMENTING REFRESHLESS SINGLE TRANSISTOR CELL eDRAM FOR HIGH PERFORMANCE MEMORY APPLICATIONS
App 20090144507 - Barth, JR.; John E. ; et al. | 2009-06-04 |
STRUCTURE FOR IMPLEMENTING REFRESHLESS SINGLE TRANSISTOR CELL eDRAM FOR HIGH PERFORMANCE MEMORY APPLICATIONS
App 20090144504 - Barth, JR.; John E. ; et al. | 2009-06-04 |
Method and circuit for dynamic read margin control of a memory array
Grant 7,042,776 - Canada , et al. May 9, 2 | 2006-05-09 |
Method And Circuit For Dynamic Read Margin Control Of A Memory Array
App 20050180228 - Canada, Miles G. ; et al. | 2005-08-18 |
Soft fuses using bist for cache self test
Grant 5,835,504 - Balkin , et al. November 10, 1 | 1998-11-10 |
Digital clock signal multiplier circuit
Grant 5,422,835 - Houle , et al. June 6, 1 | 1995-06-06 |
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