loadpatents
name:-0.024933099746704
name:-0.055854797363281
name:-0.00089406967163086
Houghton; Russell J. Patent Filings

Houghton; Russell J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Houghton; Russell J..The latest application filed is for "high impedance antifuse".

Company Profile
0.41.17
  • Houghton; Russell J. - Essex Junction VT
  • Houghton; Russell J. - Essex Jucntion VT
  • Houghton; Russell J. - Essex Junciton VT
  • Houghton; Russell J. - Essex Jct. VT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method of forming a high impedance antifuse
Grant 7,981,731 - Fifield , et al. July 19, 2
2011-07-19
Method of forming connection and anti-fuse in layered substrate such as SOI
Grant 7,226,816 - Bertin , et al. June 5, 2
2007-06-05
High impedance antifuse
App 20060289864 - Fifield; John A. ;   et al.
2006-12-28
High impedance antifuse
Grant 7,098,083 - Fifield , et al. August 29, 2
2006-08-29
Semiconductor memory
App 20060087896 - Brox; Martin ;   et al.
2006-04-27
Structures and methods of anti-fuse formation in SOI
Grant 6,972,220 - Bertin , et al. December 6, 2
2005-12-06
Structures and methods of anti-fuse formation in SOI
App 20050145983 - Bertin, Claude L. ;   et al.
2005-07-07
Low-power band-gap reference and temperature sensor circuit
Grant 6,876,250 - Hsu , et al. April 5, 2
2005-04-05
Capacitively Coupled Sensing Apparatus And Method For Cross Point Magnetic Random Access Memory Devices
App 20040228170 - Brennan, Ciaran J. ;   et al.
2004-11-18
Capacitively coupled sensing apparatus and method for cross point magnetic random access memory devices
Grant 6,816,403 - Brennan , et al. November 9, 2
2004-11-09
Method for forming a voltage programming element
Grant 6,812,122 - Bertin , et al. November 2, 2
2004-11-02
Logic SOI structure, process and application for vertical bipolar transistor
Grant 6,790,722 - Divakaruni , et al. September 14, 2
2004-09-14
High impedance antifuse
Grant 6,753,590 - Fifield , et al. June 22, 2
2004-06-22
High impedance antifuse
App 20040036091 - Fifield, John A. ;   et al.
2004-02-26
Wordline on and off voltage compensation circuit based on the array device threshold voltage
Grant 6,693,843 - Maffitt , et al. February 17, 2
2004-02-17
High impedance antifuse
App 20040004269 - Fifield, John A. ;   et al.
2004-01-08
Integrated power solution for system on chip applications
Grant 6,629,291 - Houghton , et al. September 30, 2
2003-09-30
Method to improve charge pump reliability, efficiency and size
App 20030169096 - Hsu, Louis ;   et al.
2003-09-11
Structures and methods of anti-fuse formation in SOI
Grant 6,596,592 - Bertin , et al. July 22, 2
2003-07-22
Structures and methods of anti-fuse formation in SOI
App 20030132504 - Bertin, Claude L. ;   et al.
2003-07-17
Low-power band-gap reference and temperature sensor circuit
App 20030123522 - Hsu, Louis L. ;   et al.
2003-07-03
Low-power band-gap reference and temperature sensor circuit
Grant 6,531,911 - Hsu , et al. March 11, 2
2003-03-11
Sense amplifier threshold compensation
Grant 6,518,827 - Fifield , et al. February 11, 2
2003-02-11
Sense Amplifier Threshold Compensation
App 20030021161 - Fifield, John A. ;   et al.
2003-01-30
Method for novel SOI DRAM BICMOS NPN
Grant 6,492,211 - Divakaruni , et al. December 10, 2
2002-12-10
Constant impedance driver for high speed interface
App 20020163360 - Fifield, John A. ;   et al.
2002-11-07
DRAM word line voltage control to insure full cell writeback level
App 20020159301 - Ellis, Wayne F. ;   et al.
2002-10-31
Method for forming mixed high voltage (HV/LV) transistors for CMOS devices using controlled gate depletion
Grant 6,436,749 - Tonti , et al. August 20, 2
2002-08-20
Structures and methods of anti-fuse formation in SOI
App 20020105051 - Bertin, Claude L. ;   et al.
2002-08-08
Bias circuit for series connected decoupling capacitors
Grant 6,429,730 - Houghton , et al. August 6, 2
2002-08-06
Antifuses and methods for forming the same
App 20020093074 - Bertin, Claude L. ;   et al.
2002-07-18
Structures and methods of anti-fuse formation in SOI
Grant 6,396,121 - Bertin , et al. May 28, 2
2002-05-28
Low-power DC voltage generator system
App 20020057126 - Hsu, Louis L. ;   et al.
2002-05-16
Electrically programmable antifuses and methods for forming the same
Grant 6,388,305 - Bertin , et al. May 14, 2
2002-05-14
Antifuse latch device with controlled current programming and variable trip point
Grant 6,384,666 - Bertin , et al. May 7, 2
2002-05-07
Mixed threshold voltage CMOS logic device and method of manufacture therefor
Grant 6,369,606 - Houghton , et al. April 9, 2
2002-04-09
Sense amplifier with overdrive and regulated bitline voltage
Grant 6,347,058 - Houghton , et al. February 12, 2
2002-02-12
Low-power DC voltage generator system
Grant 6,337,595 - Hsu , et al. January 8, 2
2002-01-08
Bias circuit for series connected decoupling capacitors
App 20010022528 - Houghton, Russell J. ;   et al.
2001-09-20
Control of hysteresis characteristic within a CMOS differential receiver
Grant 6,281,731 - Fifield , et al. August 28, 2
2001-08-28
Impedance control using fuses
Grant 6,243,283 - Bertin , et al. June 5, 2
2001-06-05
Single-ended semiconductor receiver with built in threshold voltage difference
App 20010000953 - Bertin, Claude L. ;   et al.
2001-05-10
Single-ended semiconductor receiver with built in threshold voltage difference
Grant 6,222,395 - Bertin , et al. April 24, 2
2001-04-24
Compensated-current mirror off-chip driver
Grant 6,177,817 - Fifield , et al. January 23, 2
2001-01-23
High frequency valid data strobe
Grant 6,177,807 - Bertin , et al. January 23, 2
2001-01-23
Impedance control using fuses
Grant 6,141,245 - Bertin , et al. October 31, 2
2000-10-31
Very low power logic circuit family with enhanced noise immunity
Grant 6,111,425 - Bertin , et al. August 29, 2
2000-08-29
Current source
Grant 6,087,820 - Houghton , et al. July 11, 2
2000-07-11
Three device BICMOS gain cell
Grant 5,909,400 - Bertin , et al. June 1, 1
1999-06-01
Multi-level storage gain cell with stepline
Grant 5,761,114 - Bertin , et al. June 2, 1
1998-06-02
Gain memory cell with diode
Grant 5,757,693 - Houghton , et al. May 26, 1
1998-05-26
Off-chip driver with voltage regulated predrive
Grant 5,440,258 - Galbi , et al. August 8, 1
1995-08-08
Boosted drive system for master/local word line memory architecture
Grant 5,255,224 - Galbi , et al. October 19, 1
1993-10-19
Stable voltage reference circuit with high Vt devices
Grant 5,221,864 - Galbi , et al. June 22, 1
1993-06-22
Defect leakage screen system
Grant 4,719,418 - Flaker , et al. January 12, 1
1988-01-12
Array word line driver system
Grant 4,413,191 - Houghton November 1, 1
1983-11-01
Sense latch
Grant 4,279,023 - Houghton July 14, 1
1981-07-14
Bipolar two device dynamic memory cell
Grant 4,181,981 - El-Kareh , et al. January 1, 1
1980-01-01

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