Hou; Cliff

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hou; Cliff.The latest application filed is for "model import for electronic design automation".

Company Profile

0.21.18

Hou; Cliff - Taipei N/A TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of generating technology file for integrated circuit design tools Grant 8,826,207 - Hou , et al. September 2, 2	2014-09-02
Model import for electronic design automation Grant 8,352,888 - Liu , et al. January 8, 2	2013-01-08
Model import for electronic design automation Grant 8,214,772 - Liu , et al. July 3, 2	2012-07-03
Method for shape and timing equivalent dimension extraction Grant 8,037,575 - Cheng , et al. October 18, 2	2011-10-18
Model Import For Electronic Design Automation App 20110231804 - Liu; Ru-Gun ; et al.	2011-09-22
Model Import For Electronic Design Automation App 20110230998 - Liu; Ru-Gun ; et al.	2011-09-22
De-coupling capacitors produced by utilizing dummy conductive structures integrated circuits Grant 7,994,606 - Hou , et al. August 9, 2	2011-08-09
Model import for electronic design automation Grant 7,954,072 - Liu , et al. May 31, 2	2011-05-31
Method for smart dummy insertion to reduce run time and dummy count Grant 7,801,717 - Chang , et al. September 21, 2	2010-09-21
Method for using mixed multi-Vt devices in a cell-based design Grant 7,797,646 - Chung , et al. September 14, 2	2010-09-14
Mother/daughter switch design with self power-up control Grant 7,793,130 - Yang , et al. September 7, 2	2010-09-07
Electrical parameter extraction for integrated circuit design Grant 7,783,999 - Ou , et al. August 24, 2	2010-08-24
Method for detection and scoring of hot spots in a design layout Grant 7,685,558 - Lai , et al. March 23, 2	2010-03-23
Design flow for shrinking circuits having non-shrinkable IP layout Grant 7,640,520 - Wang , et al. December 29, 2	2009-12-29
Method For Shape And Timing Equivalent Dimension Extraction App 20090222785 - CHENG; Ying-Chou ; et al.	2009-09-03
Electrical Parameter Extraction for Integrated Circuit Design App 20090187866 - Ou; Tsong-Hua ; et al.	2009-07-23
De-coupling Capacitors Produced By Utilizing Dummy Conductive Structures Integrated Circuits App 20090180237 - Hou; Cliff ; et al.	2009-07-16
Method of Generating Technology File for Integrated Circuit Design Tools App 20090077507 - Hou; Cliff ; et al.	2009-03-19
Mother/daughter switch design with self power-up control App 20080270813 - Yang; Shih-Hsien ; et al.	2008-10-30
Design flow for shrinking circuits having non-shrinkable IP layout App 20080229259 - Wang; Chung-Hsing ; et al.	2008-09-18
Method For Smart Dummy Insertion To Reduce Run Time And Dummy Count App 20080176343 - Chang; Gwan Sin ; et al.	2008-07-24
Method For Using Mixed Multi-vt Devices In A Cell-based Design App 20070294654 - Chung; Shine Chien ; et al.	2007-12-20
Model Import for Electronic Design Automation App 20070265725 - Liu; Ru-Gun ; et al.	2007-11-15
Method for Detection and Scoring of Hot Spots in a Design Layout App 20070266362 - Lai; Chih-Ming ; et al.	2007-11-15
Method of using mixed multi-Vt devices in a cell-based design Grant 7,281,230 - Chung , et al. October 9, 2	2007-10-09
De-coupling capacitors produced by utilizing dummy conductive structures integrated circuits Grant 7,262,951 - Hou , et al. August 28, 2	2007-08-28
Very fine-grain voltage island integrated circuit Grant 7,247,894 - Hou , et al. July 24, 2	2007-07-24
De-coupling capacitors produced by utilizing dummy conductive structures integrated circuits App 20070108554 - Hou; Cliff ; et al.	2007-05-17
Method of using mixed multi-Vt devices in a cell-based design App 20060238220 - Chung; Shine Chien ; et al.	2006-10-26
De-coupling capacitors produced by utilizing dummy conductive structures integrated circuits App 20060067032 - Hou; Cliff ; et al.	2006-03-30
Methodology to optimize hierarchical clock skew by clock delay compensation Grant 7,017,132 - Hou , et al. March 21, 2	2006-03-21
Very fine-grain voltage island integrated circuit App 20050242375 - Hou, Cliff ; et al.	2005-11-03
Methodology to optimize hierarchical clock skew by clock delay compensation App 20050102643 - Hou, Cliff ; et al.	2005-05-12
Methodology of generating antenna effect models for library/IP in VLSI physical design Grant 6,862,723 - Wang , et al. March 1, 2	2005-03-01
Flexible routing channels among vias Grant 6,797,999 - Hou , et al. September 28, 2	2004-09-28
Method and apparatus to perform resistance and capacitance (RC) parameter customization for better timing closure results in physical synthesis and optimization Grant 6,789,248 - Lu , et al. September 7, 2	2004-09-07
Flexible routing channels among vias App 20030227084 - Hou, Cliff ; et al.	2003-12-11
Automatic resistance and capacitance technology file generator for multiple RC extractors Grant 6,587,997 - Chen , et al. July 1, 2	2003-07-01

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