loadpatents
name:-0.016298055648804
name:-0.0088260173797607
name:-0.00048589706420898
Hosono; Toshikatsu Patent Filings

Hosono; Toshikatsu

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hosono; Toshikatsu.The latest application filed is for "timing verification method and apparatus".

Company Profile
0.8.12
  • Hosono; Toshikatsu - Kasugai JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Timing verification method and apparatus
Grant 7,984,406 - Akamine , et al. July 19, 2
2011-07-19
Timing analysis method and timing analysis apparatus
Grant 7,793,244 - Kimata , et al. September 7, 2
2010-09-07
Timing analysis method, timing analysis program, and timing analysis tool
Grant 7,669,154 - Hosono February 23, 2
2010-02-23
Method and device for verifying timing in a semiconductor integrated circuit
Grant 7,562,266 - Hosono July 14, 2
2009-07-14
Method and program for library generation
Grant 7,503,017 - Hosono , et al. March 10, 2
2009-03-10
Timing verification method and apparatus
App 20080178134 - Akamine; Takeichirou ;   et al.
2008-07-24
Timing analysis method and device
App 20080034338 - Hosono; Toshikatsu
2008-02-07
Method and apparatus for verifying semiconductor integrated circuits
Grant 7,299,438 - Hosono November 20, 2
2007-11-20
Timing analysis method and timing analysis apparatus
App 20070266357 - Kimata; Atsushi ;   et al.
2007-11-15
LSI design method
Grant 7,257,789 - Hosono , et al. August 14, 2
2007-08-14
Timing analysis method and device
App 20070136705 - Hosono; Toshikatsu
2007-06-14
Method and device for verifying timing in a semiconductor integrated circuit
App 20070113132 - Hosono; Toshikatsu
2007-05-17
Semiconductor integrated circuit timing analysis apparatus timing analysis method and timing analysis program
Grant 7,219,320 - Kawano , et al. May 15, 2
2007-05-15
Timing analysis method, timing analysis program, and timing analysis tool
App 20060225014 - Hosono; Toshikatsu
2006-10-05
Method and apparatus for verifying semiconductor integrated circuits
App 20060109032 - Hosono; Toshikatsu
2006-05-25
LSI design method
App 20050278672 - Hosono, Toshikatsu ;   et al.
2005-12-15
Method and program for library generation
App 20050266495 - Hosono, Toshikatsu ;   et al.
2005-12-01
Timing analysis apparatus, timing analysis method and program product
App 20050081171 - Kawano, Tetsuo ;   et al.
2005-04-14
Wiring design method of integrated circuit device, system thereof, and program product thereof
App 20030227032 - Nawa, Takanori ;   et al.
2003-12-11
Method of designing semiconductor integrated circuit device, and apparatus for designing the same
App 20020049957 - Hosono, Toshikatsu ;   et al.
2002-04-25

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed