Horstmann; Manfred

Patent Applications and Registrations

Patent applications and USPTO patent grants for Horstmann; Manfred.The latest application filed is for "transistor comprising an embedded sigma-shaped semiconductor alloy having superior uniformity".

Company Profile

0.72.84

Horstmann; Manfred - Duerrroehrsdorf-Dittersbach N/A DE
Horstmann; Manfred - Duerrrhoehrsdorf-Ditterbach DE
Horstmann; Manfred - Duerroehrsdorf-Dittersbach DE
Horstmann; Manfred - Duerrrhoehrsdorf-Dittersbach DE
Horstmann; Manfred - Duerrrhoerhrsdorf-Dittersbach DE
Horstmann; Manfred - Duehrrroersdorf-Dittersbach DE
Horstmann; Manfred - Dresden DE
Horstmann; Manfred - Duemroehrsdorf-Dittersbach DE
Horstmann; Manfred - Duerrrohrsdorf-Dittersbach DE
Horstmann; Manfred - Duerrroehrsdorf-Dittersback DE
Horstmann; Manfred - Duehrrroehrsdorf-Dittersbach DE
Horstmann; Manfred - Duerrhoehrsdorf-Ditterbach DE
Horstmann; Manfred - Duerrhoehrsdorf-Dittersbach DE
Horstmann; Manfred - Durrersdorf-Dittersbach DE
Horstmann; Manfred - Durrersdorf-Diltersbach DE
Horstmann, Manfred - Durrrohrsdorf-Dittersbach DE
Horstmann, Manfred - Dresdem DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of forming a field effect transistor Grant 8,440,516 - Wei , et al. May 14, 2	2013-05-14
Enhancing transistor characteristics by a late deep implantation in combination with a diffusion-free anneal process Grant 8,288,256 - Feudel , et al. October 16, 2	2012-10-16
Technique for providing stress sources in transistors in close proximity to a channel region by recessing drain and source regions Grant 8,274,120 - Wei , et al. September 25, 2	2012-09-25
Transistor Comprising an Embedded Sigma-Shaped Semiconductor Alloy Having Superior Uniformity App 20120161240 - Kronholz; Stephan ; et al.	2012-06-28
Drive current adjustment for transistors by local gate engineering Grant 8,188,871 - Horstmann , et al. May 29, 2	2012-05-29
Semiconductor device comprising isolation trenches inducing different types of strain Grant 8,138,571 - Schwan , et al. March 20, 2	2012-03-20
Method of enhancing lithography capabilities during gate formation in semiconductors having a pronounced surface topography Grant 8,101,512 - Gerhardt , et al. January 24, 2	2012-01-24
Etch stop layer of reduced thickness for patterning a dielectric material in a contact level of closely spaced transistors Grant 8,097,542 - Wieczorek , et al. January 17, 2	2012-01-17
Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain Grant 8,039,335 - Beyer , et al. October 18, 2	2011-10-18
Method for reducing defects of gate of CMOS devices during cleaning processes by modifying a parasitic PN junction Grant 8,039,338 - Horstmann , et al. October 18, 2	2011-10-18
Tensile strain source using silicon/germanium in globally strained silicon Grant 7,999,326 - Wei , et al. August 16, 2	2011-08-16
Method for manufacturing semiconductor device comprising SOI transistors and bulk transistors Grant 7,955,937 - Wieczorek , et al. June 7, 2	2011-06-07
Semiconductor Device Comprising Nmos And Pmos Transistors With Embedded Si/ge Material For Creating Tensile And Compressive Strain App 20110104878 - Beyer; Sven ; et al.	2011-05-05
Stress transfer in an interlayer dielectric by providing a stressed dielectric layer above a stress-neutral dielectric material in a semiconductor device Grant 7,906,383 - Richter , et al. March 15, 2	2011-03-15
Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain Grant 7,893,503 - Beyer , et al. February 22, 2	2011-02-22
SOI transistor having a reduced body potential and a method of forming the same Grant 7,863,171 - Hoentschel , et al. January 4, 2	2011-01-04
SOI transistor having an embedded strain layer and a reduced floating body effect and a method for forming the same Grant 7,829,421 - Wei , et al. November 9, 2	2010-11-09
Method of forming a semiconductor structure comprising an implantation of ions of a non-doping element Grant 7,816,199 - Feudel , et al. October 19, 2	2010-10-19
Method Of Forming A Semiconductor Structure App 20100203698 - Wirbeleit; Frank ; et al.	2010-08-12
Semiconductor Device Comprising Nmos And Pmos Transistors With Embedded Si/ge Material For Creating Tensile And Compressive Strain App 20100187635 - BEYER; SVEN ; et al.	2010-07-29
Tensile Strain Source Using Silicon/germanium In Globally Strained Silicon App 20100187629 - Wei; Andy ; et al.	2010-07-29
Transistor with embedded silicon/germanium material on a strained semiconductor on insulator substrate Grant 7,763,515 - Wei , et al. July 27, 2	2010-07-27
Method Of Forming A Field Effect Transistor App 20100181619 - Wei; Andy ; et al.	2010-07-22
Technique For Providing Stress Sources In Transistors In Close Proximity To A Channel Region By Recessing Drain And Source Regions App 20100155850 - Wei; Andy ; et al.	2010-06-24
Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain Grant 7,741,167 - Beyer , et al. June 22, 2	2010-06-22
Semiconductor device having stressed etch stop layers of different intrinsic stress in combination with PN junctions of different design in different device regions Grant 7,732,291 - Bloomquist , et al. June 8, 2	2010-06-08
Method of forming a semiconductor structure Grant 7,727,827 - Wirbeleit , et al. June 1, 2	2010-06-01
Method of forming a field effect transistor Grant 7,723,195 - Wei , et al. May 25, 2	2010-05-25
Tensile strain source using silicon/germanium in globally strained silicon Grant 7,719,060 - Wei , et al. May 18, 2	2010-05-18
Technique for providing stress sources in transistors in close proximity to a channel region by recessing drain and source regions Grant 7,696,052 - Wei , et al. April 13, 2	2010-04-13
Transistor having an embedded tensile strain layer with reduced offset to the gate electrode and a method for forming the same Grant 7,659,213 - Wei , et al. February 9, 2	2010-02-09
Method of increasing transistor drive current by recessing an isolation trench Grant 7,659,170 - Schwan , et al. February 9, 2	2010-02-09
Drive Current Adjustment For Transistors By Local Gate Engineering App 20100025776 - Horstmann; Manfred ; et al.	2010-02-04
Field effect transistor and method of forming a field effect transistor Grant 7,629,211 - Beyer , et al. December 8, 2	2009-12-08
Semiconductor device having improved halo structures and a method of forming the halo structures of a semiconductor device Grant 7,625,802 - Feudel , et al. December 1, 2	2009-12-01
Method For Reducing Defects Of Gate Of Cmos Devices During Cleaning Processes By Modifying A Parasitic Pn Junction App 20090273036 - Horstmann; Manfred ; et al.	2009-11-05
Semiconductor Device Comprising Isolation Trenches Inducing Different Types Of Strain App 20090236667 - Schwan; Christoph ; et al.	2009-09-24
Etch Stop Layer Of Reduced Thickness For Patterning A Dielectric Material In A Contact Level Of Closely Spaced Transistors App 20090218629 - Wieczorek; Karsten ; et al.	2009-09-03
Different embedded strain layers in PMOS and NMOS transistors and a method of forming the same Grant 7,579,262 - Hoentschel , et al. August 25, 2	2009-08-25
Field effect transistor having a stressed dielectric layer based on an enhanced device topography Grant 7,563,731 - Schwan , et al. July 21, 2	2009-07-21
Field effect transistor comprising a stressed channel region and method of forming the same Grant 7,556,996 - Schwan , et al. July 7, 2	2009-07-07
Method of making a semiconductor device comprising isolation trenches inducing different types of strain Grant 7,547,610 - Schwan , et al. June 16, 2	2009-06-16
Tensile Strain Source Using Silicon/germanium In Globally Strained Silicon App 20090108361 - Wei; Andy ; et al.	2009-04-30
Technique for providing stress sources in MOS transistors in close proximity to a channel region Grant 7,510,926 - Wei , et al. March 31, 2	2009-03-31
Stress Transfer In An Interlayer Dielectric By Providing A Stressed Dielectric Layer Above A Stress-neutral Dielectric Material In A Semiconductor Device App 20090057809 - Richter; Ralf ; et al.	2009-03-05
Method Of Forming A Semiconductor Structure Comprising An Implantation Of Ions Of A Non-doping Element App 20090035924 - Feudel; Thomas ; et al.	2009-02-05
Self-biasing Transistor Structure And An Sram Cell Having Less Than Six Transistors App 20090026521 - Wirbeleit; Frank ; et al.	2009-01-29
Enhancing Transistor Characteristics By A Late Deep Implantation In Combination With A Diffusion-free Anneal Process App 20080268625 - Feudel; Thomas ; et al.	2008-10-30
Self-biasing transistor structure and an SRAM cell having less than six transistors Grant 7,442,971 - Wirbeleit , et al. October 28, 2	2008-10-28
Method Of Forming A Semiconductor Structure App 20080242040 - Wirbeleit; Frank ; et al.	2008-10-02
CMOS gate structure comprising predoped semiconductor gate material with improved uniformity of dopant distribution and method of forming the structure Grant 7,419,867 - Wieczorek , et al. September 2, 2	2008-09-02
Transistor With Embedded Silicon/germanium Material On A Strained Semiconductor On Insulator Substrate App 20080179628 - Wei; Andy ; et al.	2008-07-31
Transistor device having an increased threshold stability without drive current degradation Grant 7,402,497 - Wei , et al. July 22, 2	2008-07-22
Embedded strain layer in thin SOI transistors and a method of forming the same Grant 7,399,663 - Hoentschel , et al. July 15, 2	2008-07-15
Technique for forming a substrate having crystalline semiconductor regions of different characteristics located above a crystalline bulk substrate Grant 7,381,624 - Wei , et al. June 3, 2	2008-06-03
Semiconductor Device Comprising Nmos And Pmos Transistors With Embedded Si/ge Material For Creating Tensile And Compressive Strain App 20080099794 - Beyer; Sven ; et al.	2008-05-01
Different Embedded Strain Layers In Pmos And Nmos Transistors And A Method Of Forming The Same App 20080090349 - Hoentschel; Jan ; et al.	2008-04-17
Field Effect Transistor Comprising A Stressed Channel Region And Method Of Forming The Same App 20080079039 - Schwan; Christoph ; et al.	2008-04-03
Field Effect Transistor Having A Stressed Dielectric Layer Based On An Enhanced Device Topography App 20080081486 - Schwan; Christoph ; et al.	2008-04-03
Semiconductor Device Comprising Isolation Trenches Inducing Different Types Of Strain App 20080079085 - Schwan; Christoph ; et al.	2008-04-03
Technique for providing multiple stress sources in NMOS and PMOS transistors Grant 7,329,571 - Hoentschel , et al. February 12, 2	2008-02-12
Field Effect Transistor And Method Of Forming A Field Effect Transistor App 20080026531 - Beyer; Sven ; et al.	2008-01-31
Method Of Enhancing Lithography Capabilities During Gate Formation In Semiconductors Having A Pronounced Surface Topography App 20080026552 - Gerhardt; Martin ; et al.	2008-01-31
Method Of Reducing A Roughness Of A Semiconductor Surface App 20080003783 - Wei; Andy ; et al.	2008-01-03
Method Of Increasing Transistor Performance By Dopant Activation After Silicidation App 20070281472 - Press; Patrick ; et al.	2007-12-06
Method Of Increasing Transistor Drive Current By Recessing An Isolation Trench App 20070278596 - Schwan; Christoph ; et al.	2007-12-06
Semiconductor device having a retrograde dopant profile in a channel region Grant 7,297,994 - Wieczorek , et al. November 20, 2	2007-11-20
Soi Transistor Having An Embedded Strain Layer And A Reduced Floating Body Effect And A Method For Forming The Same App 20070252204 - Wei; Andy ; et al.	2007-11-01
Soi Transistor Having A Reduced Body Potential And A Method Of Forming The Same App 20070252205 - Hoentschel; Jan ; et al.	2007-11-01
A Semiconductor Device Having Stressed Etch Stop Layers Of Different Intrinsic Stress In Combination With Pn Junctions Of Different Design In Different Device Regions App 20070254444 - Bloomquist; Joe ; et al.	2007-11-01
Transistor Having An Embedded Tensile Strain Layer With Reduced Offset To The Gate Electrode And A Method For Forming The Same App 20070254461 - Wei; Andy ; et al.	2007-11-01
Method of forming a field effect transistor App 20070254441 - Wei; Andy ; et al.	2007-11-01
Semiconductor Device Comprising Soi Transistors And Bulk Transistors And A Method Of Forming The Same App 20070228377 - Wieczorek; Karsten ; et al.	2007-10-04
Technique For Providing Stress Sources In Mos Transistors In Close Proximity To A Channel Region App 20070228357 - Wei; Andy ; et al.	2007-10-04
Technique For Providing Stress Sources In Transistors In Close Proximity To A Channel Region By Recessing Drain And Source Regions App 20070228482 - Wei; Andy ; et al.	2007-10-04
Method Of Forming A Semiconductor Structure Comprising Transistor Elements With Differently Stressed Channel Regions App 20070207583 - Burbach; Gert ; et al.	2007-09-06
Transistor Device Having An Increased Threshold Stability Without Drive Current Degradation App 20070202641 - Wei; Andy ; et al.	2007-08-30
Method of forming a semiconductor structure comprising transistor elements with differently stressed channel regions Grant 7,238,578 - Burbach , et al. July 3, 2	2007-07-03
Method of forming different silicide portions on different silicon-containing regions in a semiconductor device Grant 7,226,859 - Wieczorek , et al. June 5, 2	2007-06-05
Semiconductor device having different metal silicide portions and method for fabricating the semiconductor device Grant 7,217,657 - Wieczorek , et al. May 15, 2	2007-05-15
Embedded Strain Layer In Thin Soi Transistors And A Method Of Forming The Same App 20070096148 - Hoentschel; Jan ; et al.	2007-05-03
Technique For Providing Multiple Stress Sources In Nmos And Pmos Transistors App 20070096195 - Hoentschel; Jan ; et al.	2007-05-03
Transistor having an asymmetric source/drain and halo implantation region and a method of forming the same Grant 7,208,397 - Feudel , et al. April 24, 2	2007-04-24
Semiconductor device having T-shaped gate structure comprising in situ sidewall spacers and method of forming the semiconductor device Grant 7,148,145 - Wieczorek , et al. December 12, 2	2006-12-12
Semiconductor device having different metal-semiconductor portions formed in a semiconductor region and a method for fabricating the semiconductor device Grant 7,115,464 - Stephan , et al. October 3, 2	2006-10-03
Method of forming a metal silicide Grant 7,067,410 - Wieczorek , et al. June 27, 2	2006-06-27
Technique for forming a substrate having crystalline semiconductor regions of different characteristics located above a buried insulating layer App 20060131699 - Raab; Michael ; et al.	2006-06-22
Technique for forming contacts for buried doped regions in a semiconductor device Grant 7,064,074 - van Bentum , et al. June 20, 2	2006-06-20
SRAM devices utilizing tensile-stressed strain films and methods for fabricating the same Grant 7,060,549 - Craig , et al. June 13, 2	2006-06-13
Technique for forming a substrate having crystalline semiconductor regions of different characteristics located above a crystalline bulk substrate App 20060113629 - Wei; Andy ; et al.	2006-06-01
Method of removing features using an improved removal process in the fabrication of a semiconductor device Grant 7,041,583 - Wieczorek , et al. May 9, 2	2006-05-09
Semiconductor device including semiconductor regions having differently strained channel regions and a method of manufacturing the same App 20060094193 - Horstmann; Manfred ; et al.	2006-05-04
CMOS gate structure comprising predoped semiconductor gate material with improved uniformity of dopant distribution and method of forming the structure App 20060094183 - Wieczorek; Karsten ; et al.	2006-05-04
Transistor having an asymmetric source/drain and halo implantation region and a method of forming the same App 20060043430 - Feudel; Thomas ; et al.	2006-03-02
Method of forming a semiconductor structure comprising transistor elements with differently stressed channel regions App 20060046400 - Burbach; Gert ; et al.	2006-03-02
Self-biasing transistor structure and an SRAM cell having less than six transistors App 20060022282 - Wirbeleit; Frank ; et al.	2006-02-02
Technique for evaluating local electrical characteristics in semiconductor devices App 20060022197 - Wirbeleit; Frank ; et al.	2006-02-02
Semiconductor device having improved doping profiles and method of improving the doping profiles of a semiconductor device Grant 6,924,216 - Feudel , et al. August 2, 2	2005-08-02
Semiconductor device having a retrograde dopant profile in a channel region App 20050151202 - Wieczorek, Karsten ; et al.	2005-07-14
Diode structure for SOI circuits Grant 6,905,924 - Burbach , et al. June 14, 2	2005-06-14
Drain/source extension structure of a field effect transistor including doped high-k sidewall spacers App 20050098818 - Feudel, Thomas ; et al.	2005-05-12
Semiconductor device having a retrograde dopant profile in a channel region and method for fabricating the same Grant 6,881,641 - Wieczorek , et al. April 19, 2	2005-04-19
SOI field effect transistor element having a recombination region and method of forming same App 20050037548 - Wieczorek, Karsten ; et al.	2005-02-17
Methods of forming drain/source extension structures of a field effect transistor using a doped high-k dielectric layer Grant 6,849,516 - Feudel , et al. February 1, 2	2005-02-01
Semiconductor device having improved doping profiles and a method of improving the doping profiles of a semiconductor device Grant 6,846,708 - Feudel , et al. January 25, 2	2005-01-25
Circuit element having a metal silicide region thermally stabilized by a barrier diffusion material Grant 6,838,363 - Wieczorek , et al. January 4, 2	2005-01-04
Method of forming a metal silicide App 20040241971 - Wieczorek, Karsten ; et al.	2004-12-02
Method of assessing lateral dopant and/or charge carrier profiles Grant 6,822,430 - Feudel , et al. November 23, 2	2004-11-23
Method of forming a metal silicide gate in a standard MOS process sequence Grant 6,821,887 - Wieczorek , et al. November 23, 2	2004-11-23
SOI field effect transistor element having a recombination region and method of forming same Grant 6,812,074 - Wieczorek , et al. November 2, 2	2004-11-02
Method of manufacturing a field effect transistor Grant 6,806,153 - Wieczorek , et al. October 19, 2	2004-10-19
Diode structure for SOI circuits App 20040188768 - Burbach, Gert ; et al.	2004-09-30
Field effect transistor with reduced gate delay and method of fabricating the same Grant 6,798,028 - Horstmann , et al. September 28, 2	2004-09-28
Technique for forming contacts for buried doped regions in a semiconductor device App 20040152324 - Bentum, Ralf van ; et al.	2004-08-05
Method of assessing lateral dopant and/or charge carrier profiles App 20040152222 - Feudel, Thomas ; et al.	2004-08-05
Method of forming a semiconductor device having T-shaped gate structure Grant 6,770,552 - Wieczorek , et al. August 3, 2	2004-08-03
Semiconductor device having improved doping profiles and a method of improving the doping profiles of a semiconductor device App 20040137687 - Feudel, Thomas ; et al.	2004-07-15
Method of manufacturing a field effect transistor App 20040121565 - Wieczorek, Karsten ; et al.	2004-06-24
Method of removing features using an improved removal process in the fabrication of a semiconductor device App 20040121531 - Wieczorek, Karsten ; et al.	2004-06-24
Implant monitoring using multiple implanting and annealing steps Grant 6,754,553 - Wieczorek , et al. June 22, 2	2004-06-22
Drain/source extension structure of a field effect transistor including doped high-k sidewall spacers App 20040104442 - Feudel, Thomas ; et al.	2004-06-03
Semiconductor device having improved doping profiles and method of improving the doping profiles of a semiconductor device App 20040087120 - Feudel, Thomas ; et al.	2004-05-06
Method of removing sidewall spacers in the fabrication of a semiconductor device using an improved removal process App 20040087155 - Wieczorek, Karsten ; et al.	2004-05-06
Semiconductor device having improved halo structures and a method of forming the halo structures of a semiconductor device App 20040063262 - Feudel, Thomas ; et al.	2004-04-01
Circuit element having a metal silicide region thermally stabilized by a barrier diffusion material App 20040061228 - Wieczorek, Karsten ; et al.	2004-04-01
Method Of Forming A Semiconductor Device Having T-Shaped Gate Structure App 20040046220 - Wieczorek, Karsten ; et al.	2004-03-11
Semiconductor device having T-shaped gate structure comprising in situ sidewall spacers and method of forming the semiconductor device App 20040048472 - Wieczorek, Karsten ; et al.	2004-03-11
Method of forming a metal silicide gate in a standard MOS process sequence App 20040038435 - Wieczorek, Karsten ; et al.	2004-02-26
Semiconductor device having increased metal silicide portions and method of forming the semiconductor Grant 6,673,665 - Wieczorek , et al. January 6, 2	2004-01-06
SOI field effect transistor element having a recombination region and method of forming same App 20040000691 - Wieczorek, Karsten ; et al.	2004-01-01
Method for forming an improved metal silicide portion in a silicon-containing conductive region in an integrated circuit App 20030186523 - Wieczorek, Karsten ; et al.	2003-10-02
Semiconductor device having a retrograde dopant profile in a channel region and method for fabricating the same App 20030183856 - Wieczorek, Karsten ; et al.	2003-10-02
Semiconductor device having different metal-semiconductor portions formed in a semiconductor region and a method for fabricating the semiconductor device App 20030164524 - Stephan, Rolf ; et al.	2003-09-04
Method of forming different silicide portions on different silicon- containing regions in a semiconductor device App 20030162389 - Wieczorek, Karsten ; et al.	2003-08-28
Semiconductor device having increased metal silicide portions and method of forming the semiconductor App 20030162349 - Wieczorek, Karsten ; et al.	2003-08-28
Semiconductor device having different metal silicide portions and method for fabricating the semiconductor device App 20030160198 - Wieczorek, Karsten ; et al.	2003-08-28
Semiconductor device having a reduced signal processing time and a method of fabricating the same Grant 6,541,863 - Horstmann , et al. April 1, 2	2003-04-01
Device improvement by lowering LDD resistance with new silicide process App 20020175371 - Hause, Frederick N. ; et al.	2002-11-28
Method Of Forming Lightly Doped Regions In A Semiconductor Device App 20020061626 - Feudel, Thomas ; et al.	2002-05-23
Field effect transistor with an improved gate contact and method of fabricating the same App 20020056879 - Wieczorek, Karsten ; et al.	2002-05-16
Semiconductor device with a radiation absorbing conductive protection layer and method of fabricating the same App 20020056923 - Wieczorek, Karsten ; et al.	2002-05-16
Field effect transistor with reduced gate delay and method of fabricating the same App 20020056859 - Horstmann, Manfred ; et al.	2002-05-16
Semiconductor device with reduced line-to-line capacitance and cross talk noise App 20020056887 - Horstmann, Manfred ; et al.	2002-05-16
Method of forming an etch stop layer during manufacturing of a semiconductor device App 20020058402 - Wieczorek, Karsten ; et al.	2002-05-16
Implant monitoring using multiple implanting and annealing steps App 20020059011 - Wieczorek, Karsten ; et al.	2002-05-16
Method of controlling a shape of an oxide layer formed on a substrate App 20020048970 - Feudel, Thomas ; et al.	2002-04-25
Sidewall spacer based fet alignment technology App 20020048890 - Wieczorek, Karsten ; et al.	2002-04-25
Fully self-aligned fet technology App 20020048862 - Wieczorek, Karsten ; et al.	2002-04-25
Transistor having a peripherally increased gate insulation thickness and a method of fabricating the same Grant 6,352,885 - Wieczorek , et al. March 5, 2	2002-03-05
Low-bandgap source and drain formation for short-channel MOS transistors Grant 6,274,894 - Wieczorek , et al. August 14, 2	2001-08-14
Device with lower LDD resistance Grant 6,255,703 - Hause , et al. July 3, 2	2001-07-03
Method of forming a gate structure of a transistor by means of scalable spacer technology Grant 6,255,182 - Wieczorek , et al. July 3, 2	2001-07-03
Device improvement by lowering LDD resistance with new silicide process Grant 6,242,776 - Hause , et al. June 5, 2	2001-06-05
Low-leakage CoSi2-processing by high temperature thermal processing Grant 6,207,563 - Wieczorek , et al. March 27, 2	2001-03-27
Device improvement by source to drain resistance lowering through undersilicidation Grant 6,133,124 - Horstmann , et al. October 17, 2	2000-10-17