Hori; Chikahiro
Patent Applications and Registrations
Patent applications and USPTO patent grants for Hori; Chikahiro.The latest application filed is for "level shift switch and electronic device with the same".
- Hori; Chikahiro - Kanagawa-ken JP
- Hori; Chikahiro - Yokohama-Shi JP
- Hori; Chikahiro - Kanagawa JP
- Hori; Chikahiro - Yokohama JP
| Patent | Date |
|---|---|
| Level shift switch and electronic device with the same Grant 8,847,660 - Takiba , et al. September 30, 2 | 2014-09-30 |
| Level Shift Switch And Electronic Device With The Same App 20140118049 - TAKIBA; Akira ; et al. | 2014-05-01 |
| CMOS logic integrated circuit Grant 8,547,139 - Hori , et al. October 1, 2 | 2013-10-01 |
| Cmos Logic Integrated Circuit App 20130015883 - HORI; Chikahiro ; et al. | 2013-01-17 |
| Bidirectional buffer circuit and signal level conversion circuit Grant 7,839,172 - Hori November 23, 2 | 2010-11-23 |
| Bidirectional Buffer Circuit And Signal Level Conversion Circuit App 20090295429 - Hori; Chikahiro | 2009-12-03 |
| Oscillation circuit App 20070001771 - Hori; Chikahiro ; et al. | 2007-01-04 |
| Differential signal generating circuit, differential signal transmitting circuit and differential signal transceiver system App 20060097760 - Hori; Chikahiro | 2006-05-11 |
| Output buffer circuit Grant 6,798,247 - Hori September 28, 2 | 2004-09-28 |
| Output buffer circuit App 20030227297 - Hori, Chikahiro | 2003-12-11 |
| Logic circuit Grant 5,942,916 - Matsbara , et al. August 24, 1 | 1999-08-24 |
| Clock buffers arranged in a peripheral region of the logic circuit area Grant 5,172,330 - Watanabe , et al. December 15, 1 | 1992-12-15 |
| Associative memory device including write inhibit circuitry Grant 4,853,892 - Hori August 1, 1 | 1989-08-01 |
| Logic circuitry having two programmable interconnection arrays Grant 4,727,268 - Hori February 23, 1 | 1988-02-23 |
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