loadpatents
name:-0.003774881362915
name:-0.052757978439331
name:-0.00050806999206543
Horch; Andrew Patent Filings

Horch; Andrew

Patent Applications and Registrations

Patent applications and USPTO patent grants for Horch; Andrew.The latest application filed is for "floating gate non-volatile memory bit cell".

Company Profile
0.47.4
  • Horch; Andrew - Seattle WA US
  • Horch; Andrew - Sunnyvale CA
  • Horch; Andrew - Sunnnyvale CA
  • Horch; Andrew - Mountain View CA
  • Horch; Andrew - Boise ID
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Floating gate non-volatile memory bit cell
Grant 9,601,203 - Hommelgaard , et al. March 21, 2
2017-03-21
Floating Gate Non-volatile Memory Bit Cell
App 20130328117 - HOMMELGAARD; Mads ;   et al.
2013-12-12
Fin thyristor-based semiconductor device
Grant 7,968,381 - Horch , et al. June 28, 2
2011-06-28
Thyristor-based device with trench dielectric material
Grant 7,374,974 - Horch , et al. May 20, 2
2008-05-20
Deep trench isolation for thyristor-based semiconductor device
Grant 7,351,614 - Horch April 1, 2
2008-04-01
Thyristor-based device having dual control ports
Grant 7,320,895 - Horch , et al. January 22, 2
2008-01-22
Trench isolation for thyristor-based device
Grant 7,183,591 - Horch , et al. February 27, 2
2007-02-27
Fin thyristor-based semiconductor device
Grant 7,135,745 - Horch , et al. November 14, 2
2006-11-14
Self-aligned thin capacitively-coupled thyristor structure
Grant 7,125,753 - Horch , et al. October 24, 2
2006-10-24
Reference cells for TCCT based memory cells
Grant 7,123,508 - Horch , et al. October 17, 2
2006-10-17
Reference cells for TCCT based memory cells
Grant 7,064,977 - Horch , et al. June 20, 2
2006-06-20
Thyristor having a first emitter with relatively lightly doped portion to the base
Grant 7,053,423 - Nemati , et al. May 30, 2
2006-05-30
Shunt connection to the emitter of a thyristor
Grant 7,049,182 - Horch , et al. May 23, 2
2006-05-23
Buried emitter contact for thyristor-based semiconductor device
Grant 7,030,425 - Horch , et al. April 18, 2
2006-04-18
Varied trench depth for thyristor isolation
Grant 7,015,077 - Horch , et al. March 21, 2
2006-03-21
Trench isolation for thyristor-based device
Grant 6,998,652 - Horch , et al. February 14, 2
2006-02-14
Thyristor-based device having a reduced-resistance contact to a buried emitter region
Grant 6,980,457 - Horch , et al. December 27, 2
2005-12-27
Method for making a recessed thyristor control port
Grant 6,979,602 - Horch , et al. December 27, 2
2005-12-27
Thyristor-based device having dual control ports
Grant 6,965,129 - Horch , et al. November 15, 2
2005-11-15
Deep trench isolation for thyristor-based semiconductor device
Grant 6,953,953 - Horch October 11, 2
2005-10-11
Reference cells for TCCT based memory cells
Grant 6,940,772 - Horch , et al. September 6, 2
2005-09-06
Method of manufacturing a thyristor device with a control port in a trench
Grant 6,913,955 - Horch , et al. July 5, 2
2005-07-05
Self-aligned thin capacitively-coupled thyristor structure
Grant 6,911,680 - Horch , et al. June 28, 2
2005-06-28
Reference cells for TCCT based memory cells
Grant 6,901,021 - Horch , et al. May 31, 2
2005-05-31
Increased base-emitter capacitance
Grant 6,888,177 - Nemati , et al. May 3, 2
2005-05-03
Carrier coupler for thyristor-based semiconductor device
Grant 6,872,602 - Nemati , et al. March 29, 2
2005-03-29
Method of preventing high Icc at start-up in zero-power EEPROM cells for PLD applications
Grant 6,845,044 - Horch , et al. January 18, 2
2005-01-18
Thyristor-based device with trench dielectric material
Grant 6,835,997 - Horch , et al. December 28, 2
2004-12-28
Semiconductor region self-aligned with ion implant shadowing
Grant 6,828,202 - Horch December 7, 2
2004-12-07
Thyristor having a first emitter with relatively lightly doped portion to the base
Grant 6,828,176 - Nemati , et al. December 7, 2
2004-12-07
Method for trench isolation for thyristor-based device
Grant 6,818,482 - Horch , et al. November 16, 2
2004-11-16
Varied trench depth for thyristor isolation
Grant 6,815,734 - Horch , et al. November 9, 2
2004-11-09
Method for making an inlayed thyristor-based device
Grant 6,790,713 - Horch September 14, 2
2004-09-14
Reference cells for TCCT based memory cells
Grant 6,781,888 - Horch , et al. August 24, 2
2004-08-24
Thyristor-based device including trench isolation
Grant 6,777,271 - Robins , et al. August 17, 2
2004-08-17
Method of forming self-aligned thin capacitively-coupled thyristor structure
Grant 6,767,770 - Horch , et al. July 27, 2
2004-07-27
Carrier coupler for thyristor-based semiconductor device
Grant 6,756,612 - Nemati , et al. June 29, 2
2004-06-29
Thyristor-based device including trench dielectric isolation for thyristor-body regions
Grant 6,727,528 - Robins , et al. April 27, 2
2004-04-27
Thyristor with lightly-doped emitter
Grant 6,703,646 - Nemati , et al. March 9, 2
2004-03-09
Thyristor-based device over substrate surface
Grant 6,690,038 - Cho , et al. February 10, 2
2004-02-10
Thyristor-based device that inhibits undesirable conductive channel formation
Grant 6,690,039 - Nemati , et al. February 10, 2
2004-02-10
Thyristor-based device adapted to inhibit parasitic current
Grant 6,686,612 - Horch , et al. February 3, 2
2004-02-03
Recessed thyristor control port
Grant 6,683,330 - Horch , et al. January 27, 2
2004-01-27
Shunt connection to emitter
Grant 6,666,481 - Horch , et al. December 23, 2
2003-12-23
Thyristor-based device over substrate surface
Grant 6,653,174 - Cho , et al. November 25, 2
2003-11-25
Non-volatile memory element having a cascoded transistor scheme to reduce oxide field stress
Grant 6,636,442 - Rowlandson , et al. October 21, 2
2003-10-21
Non-volatile Memory Element Having A Cascoded Transistor Scheme To Reduce Oxide Field Stress
App 20030142549 - Rowlandson, Michael ;   et al.
2003-07-31
Method of preventing high Icc at start-up in zero-power EEPROM cells for PLD applications
App 20030143793 - Horch, Andrew ;   et al.
2003-07-31
Method and system for decoupling inoperative passive elements on a semiconductor chip
Grant 5,329,237 - Horch July 12, 1
1994-07-12

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