Horak; David Vaclav

Patent Applications and Registrations

Patent applications and USPTO patent grants for Horak; David Vaclav.The latest application filed is for "self-aligned dielectric isolation for finfet devices".

Company Profile

1.74.85

Horak; David Vaclav - Essex Junction VT
Horak; David Vaclav - Hopewell Junction NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of cleaving a single crystal substrate parallel to its active planar surface and method of using the cleaved daughter substrate Grant 10,589,445 - Furukawa , et al.	2020-03-17
Self-aligned dielectric isolation for FinFET devices Grant 9,627,377 - Bergendahl , et al. April 18, 2	2017-04-18
Self-aligned Dielectric Isolation For Finfet Devices App 20150061040 - Bergendahl; Marc Adam ; et al.	2015-03-05
Self-aligned dielectric isolation for FinFET devices Grant 8,941,156 - Bergendahl , et al. January 27, 2	2015-01-27
Method of forming finFET of variable channel width Grant 8,896,067 - Bergendahl , et al. November 25, 2	2014-11-25
Method Of Forming Finfet Of Variable Channel Width App 20140191323 - Bergendahl; Marc Adam ; et al.	2014-07-10
Self-aligned Dielectric Isolation For Finfet Devices App 20140191296 - Bergendahl; Marc Adam ; et al.	2014-07-10
Method for forming a self-aligned contact opening by a lateral etch Grant 8,679,968 - Xie , et al. March 25, 2	2014-03-25
Method For Forming A Self-aligned Contact Opening By A Lateral Etch App 20130307087 - Xie; Ruilong ; et al.	2013-11-21
Method of fabricating semiconductor capacitor Grant 8,518,773 - Horak , et al. August 27, 2	2013-08-27
Semiconductor Capacitor App 20130065376 - Horak; David Vaclav ; et al.	2013-03-14
Semiconductor capacitor Grant 8,354,703 - Horak , et al. January 15, 2	2013-01-15
Semiconductor Capacitor App 20120012980 - HORAK; DAVID VACLAV ; et al.	2012-01-19
Semiconductor Capacitor App 20120012979 - Horak; David Vaclav ; et al.	2012-01-19
Structure and method for back end of the line integration Grant 8,021,974 - Yang , et al. September 20, 2	2011-09-20
Metal-oxide-semiconductor device structures with tailored dopant depth profiles Grant 7,994,575 - Furukawa , et al. August 9, 2	2011-08-09
Method of making integrated circuit chip utilizing oriented carbon nanotube conductive layers Grant 7,989,222 - Furukawa , et al. August 2, 2	2011-08-02
Semiconductor transistors with contact holes close to gates Grant 7,985,643 - Furukawa , et al. July 26, 2	2011-07-26
Methods for fabricating a metal-oxide-semiconductor device structure Grant 7,951,660 - Furukawa , et al. May 31, 2	2011-05-31
Layer patterning using double exposure processes in a single photoresist layer Grant 7,923,202 - Furukawa , et al. April 12, 2	2011-04-12
Passive electrically testable acceleration and voltage measurement devices Grant 7,898,045 - Furukawa , et al. March 1, 2	2011-03-01
Methods and structures for promoting stable synthesis of carbon nanotubes Grant 7,851,064 - Furukawa , et al. December 14, 2	2010-12-14
Vertical carbon nanotube field effect transistors and arrays Grant 7,829,883 - Furukawa , et al. November 9, 2	2010-11-09
Method of Making Integrated Circuit Chip Utilizing Oriented Carbon Nanotube Conductive Layers App 20100273298 - Furukawa; Toshiharu ; et al.	2010-10-28
Immersion lithography contamination gettering layer Grant 7,807,335 - Corliss , et al. October 5, 2	2010-10-05
Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures Grant 7,791,145 - Furukawa , et al. September 7, 2	2010-09-07
Integrated circuit chip utilizing oriented carbon nanotube conductive layers Grant 7,786,583 - Furukawa , et al. August 31, 2	2010-08-31
Structure And Method For Back End Of The Line Integration App 20100176512 - Yang; Chih-Chao ; et al.	2010-07-15
Design structure incorporating a hybrid substrate Grant 7,750,406 - Cannon , et al. July 6, 2	2010-07-06
Well isolation trenches (WIT) for CMOS devices Grant 7,737,504 - Furukawa , et al. June 15, 2	2010-06-15
Methods and semiconductor structures for latch-up suppression using a conductive region Grant 7,727,848 - Furukawa , et al. June 1, 2	2010-06-01
Sidewall image transfer processes for forming multiple line-widths Grant 7,699,996 - Furukawa , et al. April 20, 2	2010-04-20
Vertical nanotube semiconductor device structures and methods of forming the same Grant 7,691,720 - Furukawa , et al. April 6, 2	2010-04-06
Method of forming a dual gated FinFET gain cell Grant 7,674,674 - Furukawa , et al. March 9, 2	2010-03-09
Non-volatile switching and memory devices using vertical nanotubes Grant 7,668,004 - Furukawa , et al. February 23, 2	2010-02-23
Methods and semiconductor structures for latch-up suppression using a conductive region Grant 7,655,985 - Furukawa , et al. February 2, 2	2010-02-02
Hybrid substrates and methods for forming such hybrid substrates Grant 7,651,902 - Cannon , et al. January 26, 2	2010-01-26
Method of fabricating semiconductor structures for latch-up suppression Grant 7,648,869 - Chang , et al. January 19, 2	2010-01-19
Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures Grant 7,645,676 - Furukawa , et al. January 12, 2	2010-01-12
Passive electrically testable acceleration and voltage measurement devices Grant 7,629,192 - Furukawa , et al. December 8, 2	2009-12-08
Micro-electro-mechanical valves and pumps and methods of fabricating same Grant 7,607,455 - Furukawa , et al. October 27, 2	2009-10-27
Methods of forming low-k dielectric layers containing carbon nanostructures Grant 7,579,272 - Furukawa , et al. August 25, 2	2009-08-25
Method of forming a dual gated FinFET gain cell Grant 7,566,613 - Furukawa , et al. July 28, 2	2009-07-28
Methods for forming a wrap-around gate field effect transistor Grant 7,560,347 - Furukawa , et al. July 14, 2	2009-07-14
Shallow trench isolation fill by liquid phase deposition of SiO.sub.2 Grant 7,525,156 - Hakey , et al. April 28, 2	2009-04-28
Method of forming optical sensor that includes three pairs of electrodes formed at different depths in a semiconductor substrate Grant 7,517,716 - Furukawa , et al. April 14, 2	2009-04-14
Micro-electro-mechanical valves and pumps Grant 7,505,110 - Furukawa , et al. March 17, 2	2009-03-17
Electric fuses using CNTs (carbon nanotubes) Grant 7,492,046 - Furukawa , et al. February 17, 2	2009-02-17
Methods and semiconductor structures for latch-up suppression using a conductive region Grant 7,491,618 - Furukawa , et al. February 17, 2	2009-02-17
Layer Patterning Using Double Exposure Processes In A Single Photoresist Layer App 20090035708 - Furukawa; Toshiharu ; et al.	2009-02-05
Memory devices using carbon nanotube (CNT) technologies Grant 7,483,285 - Furukawa , et al. January 27, 2	2009-01-27
Method for making integrated circuit chip having carbon nanotube composite interconnection vias Grant 7,473,633 - Furukawa , et al. January 6, 2	2009-01-06
Digital Circuits Having Additional Capacitors For Additional Stability App 20090001481 - Cannon; Ethan Harrison ; et al.	2009-01-01
Methods And Semiconductor Structures For Latch-up Suppression Using A Conductive Region App 20080268610 - Furukawa; Toshiharu ; et al.	2008-10-30
Hybrid Substrates and Methods for Forming Such Hybrid Substrates App 20080258181 - Cannon; Ethan Harrison ; et al.	2008-10-23
Design Structure Incorporating a Hybrid Substrate App 20080258222 - Cannon; Ethan Harrison ; et al.	2008-10-23
Passive Electrically Testable Acceleration And Voltage Measurement Devices App 20080258246 - Furukawa; Toshiharu ; et al.	2008-10-23
Dual Gated Finfet Gain Cell App 20080261363 - Furukawa; Toshiharu ; et al.	2008-10-23
Method for making integrated circuit chip utilizing oriented carbon nanotube conductive layers Grant 7,439,081 - Furukawa , et al. October 21, 2	2008-10-21
Methods for forming a wrap-around gate field effect transistor Grant 7,435,653 - Furukawa , et al. October 14, 2	2008-10-14
Micro-electro-mechanical Valves And Pumps And Methods Of Fabricating Same App 20080245984 - Furukawa; Toshiharu ; et al.	2008-10-09
Methods For Fabricating Semiconductor Device Structures With Reduced Susceptibility To Latch-up And Semiconductor Device Structures Formed By The Methods App 20080242016 - Cannon; Ethan Harrison ; et al.	2008-10-02
Vertical Nanotube Semiconductor Device Structures And Methods Of Forming The Same App 20080227264 - Furukawa; Toshiharu ; et al.	2008-09-18
Methods And Semiconductor Structures For Latch-up Suppression Using A Conductive Region App 20080217698 - Furukawa; Toshiharu ; et al.	2008-09-11
Sidewall Image Transfer Processes For Forming Multiple Line-widths App 20080206996 - Furukawa; Toshiharu ; et al.	2008-08-28
Wrap-around Gate Field Effect Transistor App 20080206937 - Furukawa; Toshiharu ; et al.	2008-08-28
Methods For Fabricating Semiconductor Device Structures With Reduced Susceptibility To Latch-up And Semiconductor Device Structures Formed By The Methods App 20080203492 - Cannon; Ethan Harrison ; et al.	2008-08-28
SHALLOW TRENCH ISOLATION FILL BY LIQUID PHASE DEPOSITION OF SiO2 App 20080197448 - Hakey; Mark Charles ; et al.	2008-08-21
Semiconductor Transistors With Contact Holes Close To Gates App 20080166863 - Furukawa; Toshiharu ; et al.	2008-07-10
High performance single event upset hardened SRAM cell Grant 7,397,692 - Cannon , et al. July 8, 2	2008-07-08
Methods And Structures For Promoting Stable Synthesis Of Carbon Nanotubes App 20080160312 - Furukawa; Toshiharu ; et al.	2008-07-03
Semiconductor Optical Sensors App 20080153195 - Furukawa; Toshiharu ; et al.	2008-06-26
High Performance Single Event Upset Hardened Sram Cell App 20080144348 - Cannon; Ethan Harrison ; et al.	2008-06-19
Non-volatile Switching And Memory Devices Using Vertical Nanotubes App 20080137397 - Furukawa; Toshiharu ; et al.	2008-06-12
Memory devices using carbon nanotube (CNT) technologies Grant 7,385,839 - Furukawa , et al. June 10, 2	2008-06-10
Shallow trench isolation method for shielding trapped charge in a semiconductor device Grant 7,385,275 - Cannon , et al. June 10, 2	2008-06-10
Memory Devices Using Carbon Nanotube (cnt) Technologies App 20080117671 - Furukawa; Toshiharu ; et al.	2008-05-22
Shallow Trench Isolation Structure For Shielding Trapped Charge In A Semiconductor Device App 20080116529 - Cannon; Ethan Harrison ; et al.	2008-05-22
Method Of Forming Lithographic And Sub-lithographic Dimensioned Structures App 20080085600 - Furukawa; Toshiharu ; et al.	2008-04-10
Semiconductor Structures For Latch-up Suppression And Methods Of Forming Such Semiconductor Structures App 20080057671 - Furukawa; Toshiharu ; et al.	2008-03-06
Methods Of Fabricating Vertical Carbon Nanotube Field Effect Transistors For Arrangement In Arrays And Field Effect Transistors And Arrays Formed Thereby App 20080044954 - Furukawa; Toshiharu ; et al.	2008-02-21
Integrated Circuit Chip Utilizing Oriented Carbon Nanotube Conductive Layers App 20080042287 - Furukawa; Toshiharu ; et al.	2008-02-21
Design Structures Incorporating Shallow Trench Isolation Filled by Liquid Phase Deposition of SiO2 App 20080040696 - Hakey; Mark Charles ; et al.	2008-02-14
Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passage Grant 7,329,567 - Furukawa , et al. February 12, 2	2008-02-12
ELECTRIC FUSES USING CNTs (CARBON NANOTUBES) App 20070262450 - Furukawa; Toshiharu ; et al.	2007-11-15
Well Isolation Trenches (wit) For Cmos Devices App 20070241408 - Furukawa; Toshiharu ; et al.	2007-10-18
Semiconductor Structures For Latch-up Suppression And Methods Of Forming Such Semiconductor Structures App 20070241409 - Furukawa; Toshiharu ; et al.	2007-10-18
Method of forming fet with T-shaped gate Grant 7,282,423 - Furukawa , et al. October 16, 2	2007-10-16
SHALLOW TRENCH ISOLATION FILL BY LIQUID PHASE DEPOSITION OF SiO2 App 20070228510 - Hakey; Mark Charles ; et al.	2007-10-04
Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures Grant 7,276,768 - Furukawa , et al. October 2, 2	2007-10-02
Shallow trench isolation fill by liquid phase deposition of SiO2 Grant 7,273,794 - Hakey , et al. September 25, 2	2007-09-25
Micro-electro-mechanical Valves And Pumps And Methods Of Fabricating Same App 20070215224 - Furukawa; Toshiharu ; et al.	2007-09-20
Wrap-around gate field effect transistor Grant 7,271,444 - Furukawa , et al. September 18, 2	2007-09-18
Well isolation trenches (WIT) for CMOS devices Grant 7,268,028 - Furukawa , et al. September 11, 2	2007-09-11
Methods of forming alternating phase shift masks having improved phase-shift tolerance Grant 7,264,415 - Furukawa , et al. September 4, 2	2007-09-04
Methods for fabricating semiconductor device structures with reduced susceptibility to latch-up and semiconductor device structures formed by the methods App 20070194403 - Cannon; Ethan Harrison ; et al.	2007-08-23
Shallow Trench Isolation Structure For Shielding Trapped Charge In A Semiconductor Device App 20070187778 - Cannon; Ethan Harrison ; et al.	2007-08-16
Wrap-around Gate Field Effect Transistor App 20070184588 - Furukawa; Toshiharu ; et al.	2007-08-09
Integrated Circuit Chip Utilizing Dielectric Layer Having Oriented Cylindrical Voids Formed from Carbon Nanotubes App 20070184647 - Furukawa; Toshiharu ; et al.	2007-08-09
Methods and semiconductor structures for latch-up suppression using a conductive region App 20070170543 - Furukawa; Toshiharu ; et al.	2007-07-26
Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures App 20070170518 - Furukawa; Toshiharu ; et al.	2007-07-26
Methods and semiconductor structures for latch-up suppression using a buried damage layer App 20070158779 - Cannon; Ethan Harrison ; et al.	2007-07-12
Methods and semiconductor structures for latch-up suppression using a buried conductive region App 20070158755 - Chang; Shunhua Thomas ; et al.	2007-07-12
Memory Devices Using Carbon Nanotube (cnt) Technologies App 20070133266 - Furukawa; Toshiharu ; et al.	2007-06-14
Integrated circuit chip utilizing dielectric layer having oriented cylindrical voids formed from carbon nanotubes Grant 7,229,909 - Furukawa , et al. June 12, 2	2007-06-12
Methods Of Forming Low-k Dielectric Layers Containing Carbon Nanostructures App 20070123028 - Furukawa; Toshiharu ; et al.	2007-05-31
Semiconductor Optical Sensors App 20070108473 - Furukawa; Toshiharu ; et al.	2007-05-17
Semiconductor Transistors With Contact Holes Close To Gates App 20070102766 - Furukawa; Toshiharu ; et al.	2007-05-10
Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passage Grant 7,211,844 - Furukawa , et al. May 1, 2	2007-05-01
Passive Electrically Testable Acceleration And Voltage Measurement Devices App 20070085156 - Furukawa; Toshiharu ; et al.	2007-04-19
Sidewall Image Transfer (sit) Technologies App 20070066009 - Furukawa; Toshiharu ; et al.	2007-03-22
Integrated Circuit Chip Utilizing Oriented Carbon Nanotube Conductive Layers App 20070048879 - Furukawa; Toshiharu ; et al.	2007-03-01
Non-volatile Switching And Memory Devices Using Vertical Nanotubes App 20070025138 - Furukawa; Toshiharu ; et al.	2007-02-01
Method For Making Integrated Circuit Chip Having Carbon Nanotube Composite Interconnection Vias App 20060292861 - Furukawa; Toshiharu ; et al.	2006-12-28
Immersion lithography contamination gettering layer App 20060275706 - Corliss; Daniel A. ; et al.	2006-12-07
Integrated circuit chip utilizing carbon nanotube composite interconnection vias Grant 7,135,773 - Furukawa , et al. November 14, 2	2006-11-14
Integrated circuit chip utilizing oriented carbon nanotube conductive layers Grant 7,129,097 - Furukawa , et al. October 31, 2	2006-10-31
Method For Fabricating Oxygen-implanted Silicon On Insulation Type Semiconductor And Semiconductor Formed Therefrom App 20060226480 - Furukawa; Toshiharu ; et al.	2006-10-12
Horizontal memory gain cells Grant 7,109,546 - Furukawa , et al. September 19, 2	2006-09-19
Strained semiconductor device structures Grant 7,102,201 - Furukawa , et al. September 5, 2	2006-09-05
Moving lens for immersion optical lithography Grant 7,088,422 - Hakey , et al. August 8, 2	2006-08-08
Process For Oxide Cap Formation In Semiconductor Manufacturing App 20060166432 - Holmes; Steven John ; et al.	2006-07-27
Integrated circuit chip utilizing dielectric layer having oriented cylindrical voids formed from carbon nanotubes App 20060128137 - Furukawa; Toshiharu ; et al.	2006-06-15
Selective synthesis of semiconducting carbon nanotubes Grant 7,038,299 - Furukawa , et al. May 2, 2	2006-05-02
Low-k Dielectric Material Based Upon Carbon Nanotubes And Methods Of Forming Such Low-k Dielectric Materials App 20060073682 - Furukawa; Toshiharu ; et al.	2006-04-06
Integrated circuit chip utilizing oriented carbon nanotube conductive layers App 20060022221 - Furukawa; Toshiharu ; et al.	2006-02-02
Method for fabricating strained semiconductor structures and strained semiconductor structures formed thereby App 20060011990 - Furukawa; Toshiharu ; et al.	2006-01-19
Dual gated finfet gain cell App 20060008927 - Furukawa; Toshiharu ; et al.	2006-01-12
Horizontal memory gain cells App 20050286293 - Furukawa, Toshiharu ; et al.	2005-12-29
Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passage App 20050266627 - Furukawa, Toshiharu ; et al.	2005-12-01
Dual gated finfet gain cell Grant 6,970,372 - Furukawa , et al. November 29, 2	2005-11-29
Methods for fabricating a metal-oxide-semiconductor device structure and metal-oxide-semiconductor device structures formed thereby App 20050242378 - Furukawa, Toshiharu ; et al.	2005-11-03
Methods of forming alternating phase shift masks having improved phase-shift tolerance App 20050202322 - Furukawa, Toshiharu ; et al.	2005-09-15
Integrated circuit chip utilizing carbon nanotube composite interconnection vias App 20050189655 - Furukawa, Toshiharu ; et al.	2005-09-01
Methods of fabricating vertical carbon nanotube field effect transistors for arrangement in arrays and field effect transistors and arrays formed thereby App 20050179029 - Furukawa, Toshiharu ; et al.	2005-08-18
Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passage App 20050167740 - Furukawa, Toshiharu ; et al.	2005-08-04
Vertical nanotube semiconductor device structures and methods of forming the same App 20050167655 - Furukawa, Toshiharu ; et al.	2005-08-04
Moving lens for immersion optical lithography App 20050145803 - Hakey, Mark Charles ; et al.	2005-07-07
Selective synthesis of semiconducting carbon nanotubes App 20050130341 - Furukawa, Toshiharu ; et al.	2005-06-16
Shallow trench isolation fill by liquid phase deposition of SiO2 App 20050130387 - Hakey, Mark Charles ; et al.	2005-06-16
Wrap-around gate field effect transistor App 20050127466 - Furukawa, Toshiharu ; et al.	2005-06-16
Method of forming fet with T-shaped gate App 20050104139 - Furukawa, Toshiharu ; et al.	2005-05-19
Methods for fabricating a metal-oxide-semiconductor device structure and metal-oxide-semiconductor device structures formed thereby App 20050098804 - Furukawa, Toshiharu ; et al.	2005-05-12
FET with T-shaped gate Grant 6,891,235 - Furukawa , et al. May 10, 2	2005-05-10
Method for supporting a bond pad in a multilevel interconnect structure and support structure formed thereby Grant 6,890,828 - Horak , et al. May 10, 2	2005-05-10
Method for forming quadruple density sidewall image transfer (SIT) structures Grant 6,875,703 - Furukawa , et al. April 5, 2	2005-04-05
Method for supporting a bond pad in a multilevel interconnect structure and support structure formed thereby App 20040245637 - Horak, David Vaclav ; et al.	2004-12-09
Gate oxide stabilization by means of germanium components in gate conductor Grant 6,797,641 - Holmes , et al. September 28, 2	2004-09-28
Method for manufacturing a multi-level interconnect structure Grant 6,713,835 - Horak , et al. March 30, 2	2004-03-30
Gate oxide stabilization by means of germanium components in gate conductor App 20020125503 - Holmes, Steven J. ; et al.	2002-09-12
Vertical DRAM cell with TFT over trench capacitor Grant 6,373,091 - Horak , et al. April 16, 2	2002-04-16
Vertical DRAM cell with TFT over trench capacitor App 20010021553 - Horak, David Vaclav ; et al.	2001-09-13
Vertical DRAM cell with TFT over trench capacitor Grant 6,228,706 - Horak , et al. May 8, 2	2001-05-08
Trench storage dram cell including a step transfer device Grant 5,831,301 - Horak , et al. November 3, 1	1998-11-03